Real-Time Method for Detecting Harmonic and Reactive Currents of Single-Phase Circuits

According to the characteristics of single-phase circuits and demand of using active filter for real-time detecting harmonic and reactive currents, a detecting method based on Fryze＇s power definition is proposed. The results of theoretical analysis and simula- tion show that the proposed method is effective in realtime detecting of instantaneous harmonic and reactive currents in single-phase circuits. When only detecting the total reactive currents, this method does not need a phase-locked loop circuit, and it also can be used in some special applications to provide different compensations on the ground of different requirements of electric network. Compared with the other methods based on the theory of instantaneous reactive power, this method is simple and easy to realize.

Artificial Bee Colony Algorithm-based Parameter Estimation of Fractional-order Chaotic System with Time Delay

It is an important issue to estimate parameters of fractional-order chaotic systems in nonlinear science, which has received increasing interest in recent years. In this paper, time delay and fractional order as well as system's parameters are concerned by treating the time delay and fractional order as additional parameters. The parameter estimation is converted into a multi-dimensional optimization problem. A new scheme based on artificial bee colony ABC algorithm is proposed to solve the optimization problem. Numerical experiments are performed on two typical time-delay fractional-order chaotic systems to verify the effectiveness of the proposed method. © 2014 Chinese Association of Automation.

Design and implementation of high speed TDI CCD timing-driven circuits

The time delay integration charge coupled device(TDI CCD)is the key component in remote sensing systems.The paper analyzes the structure and the working principles of the device according to a customized TDI CCD chip.Employing the special clock resources and large-scale phase locked logic(PLL)in field-programmable gate arrays(FPGA),a timing-driven approach is proposed,using which all timing signals including reset gate,horizontal and vertical timing signals,are implemented in one chip.This not only reduces printed circuit board(PCB)space,but also enhances the portability of the system.By studying and calculating CCD parameters thoroughly,load capacity and power consumption,package,etc,are compared between various candidates chips,and detailed comparison results are also listed in table.Experimental results show that clock generator and driving circuit satisfy the requirements of high speed TDI CCD.

A New Analyzing Method of Single Event Latch-Up Protection Circuit Based on Current Comparing and Its Performance Verification

Single event latch-up (SEL) is a significant issue for electronics design in space application, which would cause large currents in electronic devices, and may lead to burning out of devices. A new monitoring circuit based on current-comparing method is designed to protect the electronics away from SEL’s damage in radiation environment. The response time of protection circuit has been analyzed. The signal simulation results indicated that the operating time of the SEL protection circuit is dependent on the action time of current comparator and system application recovery time. The function of the monitoring circuit protection device away from SEL’s damage has validated through experiment at last.

Timing-Driven Variation-Aware Partitioning and Optimization of Mixed Static-Dynamic CMOS Circuits

The advancement in CMOS technology has surpassed the progress in computer aided design tools, creating an avenue for new design optimization flows. This paper presents a design level transistor sizing based timing optimization algorithms for mixed-static-dynamic CMOS logic designs. This optimization algorithm performs timing optimization through partitioning a design into static and dynamic circuits based on timing critical paths, and is further extended through a process variation aware circuit level timing optimization algorithm for dynamic CMOS circuits. Implemented on a 64-b adder and ISCAS benchmark circuits for mixed-static-dynamic CMOS, the design level optimization algorithm demonstrated a critical path delay improvement of over 52% in comparison with static CMOS implementation by state-of-the-art commercial optimization tools.

An Experiment to Improve the Model of Lumped Element Circuit

The model of lumped element circuit ignores the finite time of signals to propagate around a circuit. However, using modern oscilloscope, the time of nanoseconds in a circuit can be measured. Then the speed of alternating electricity can be obtained in a RL circuit. A typical RL circuit is formed by a power source, wire, resistance and inductance. The basic formula is: U(t)=I(t)R+LdI(t)/dt. It can be derived from the Ohm’s law and Kirchhoff laws. Based on our experimental results, this paper has discussed the new explanation of this equation in a RL circuit. As a result, the speed of alternating electricity is greater than light in a special RL circuit. The model of lumped element circuit can be improved when considering the finite time of signals.

Direct Current Circuit Breaker in EAST

This paper introduces the configuration and the operation principles of a high power direct current circuit breaker （DCCB）. The commutating current principle of the breaker is described in details with its theory and simulation analysis. The test results presented show that the DCCB meets the requirements for quenching protection. It will be used as the main breaker for quench protection in EAST.

基于短时傅里叶变换和深度网络的模块化多电平换流器子模块IGBT开路故障诊断

针对现有模块化多电平换流器(MMC)子模块故障诊断过程中所需传感器较多、测量干扰较大等问题,提出一种基于深度学习的MMC子模块IGBT开路故障诊断方法。在对MMC子模块开路故障特征进行分析的基础上,利用短时傅里叶变换(STFT)提取桥臂电压信号的谐波分量信息作为故障诊断所需的特征参数。将所得到的特征参数进行处理后构建故障诊断样本,在通过深度置信网络实现故障类型快速检测的基础上,依据不同故障类型,构建多个基于卷积神经网络的故障定位网络,进而实现开路故障的检测与定位。通过129电平的MMC系统仿真模型和降功率的MMC实验系统搭建,对该文所提方法进行了验证。仿真和实验结果表明,所提故障诊断方法可以在减少传感器数量的基础上实现子模块开路故障的诊断,提高系统的可靠性。

基于集成光子储备池的时间序列任务预测 (特邀)

光子储备池因其反馈连接的拓扑结构,在时间序列任务中展现出巨大潜力,主要形式包括延时型、波导型、空间光型和空腔型储备池。其中,波导型集成光子储备池具有并行输入和高集成度的特点,在时间序列二进制任务中表现突出。然而,针对更复杂的模拟数值预测任务,传统方法下的单个集成光子储备池因物理节点数量有限,导致计算性能不足。为解决这一问题,提出了一种32节点梅花形光子储备池芯片,外围节点作为输入输出节点,各输入节点通过强度调制引入非线性效应,接收不同的调制信号,各输出节点基于历史数据,采用向量自回归算法进行训练,从而实现更高效且精确的时间序列预测任务。研究结果表明:通过优化输入策略、芯片设计和训练算法,32节点集成光子储备池相较于传统延时型光子储备池,在预测任务中的RMSE和NMSE指标分别提升了两个和一个数量级,使波导型集成光子储备池在时间序列预测任务中成为有力竞争方法。

Graph Modeling for Static Timing Analysis at Transistor Level in Nano-Scale CMOS Circuits

The development and the revolution of nanotechnology require more and effective methods to accurately estimating the timing analysis for any CMOS transistor level circuit. Many researches attempted to resolve the timing analysis, but the best method found till the moment is the Static Timing Analysis (STA). It is considered the best solution because of its accuracy and fast run time. Transistor level models are mandatory required for the best estimating methods, since these take into consideration all analysis scenarios to overcome problems of multiple-input switching, false paths and high stacks that are found in classic CMOS gates. In this paper, transistor level graph model is proposed to describe the behavior of CMOS circuits under predictive Nanotechnology SPICE parameters. This model represents the transistor in the CMOS circuit as nodes in the graph regardless of its positions in the gates to accurately estimating the timing analysis rather than inaccurate estimating which caused by the false paths at the gate level. Accurate static timing analysis is estimated using the model proposed in this paper. Building on the proposed model and the graph theory concepts, new algorithms are proposed and simulated to compute transistor timing analysis using RC model. Simulation results show the validity of the proposed graph model and its algorithms by using predictive Nano-Technology SPICE parameters for the tested technology. An important and effective extension has been achieved in this paper for a one that was published in international conference.

保持主导振荡模态的双馈风电场动态聚合等值方法

针对风电场详细建模出现的“维数灾”问题,计及双馈风电机组各控制环节与系统振荡模态的关系,以保持等值前后主导振荡模态一致为目标,提出考虑风电机组多时间尺度级联特性的风电场站等值聚合方法。首先考虑风电机组多控制环节级联建立风电场状态空间模型;其次,利用振荡能量级判别系统主导振荡模态,并基于参与因子分析不同模态的关键影响因素;在此基础上,以主导振荡模态的关键影响因素为分群指标,结合自编码器进行数据降维处理,经改进聚合算法聚类和拓扑变换获取等值参数等环节后得到等值模型。最后,在Matlab平台分别搭建单机模型和含24台双馈风电机组的风电场模型,验证了所提等值方法的有效性。

基于NI myDAQ的线性动态电路参数测量

动态电路在实际生活中应用广泛,精确测量动态电路的参数具有工程意义。采用线上线下混合式教学模式、仿真和实测相融合的实验方法,利用NI myDAQ虚拟实验平台测量动态电路参数,开拓了学生的思维,提高了学生的综合实验能力。

Real-time and wearable functional electrical stimulation system for volitional hand motor function control using the electromyography bridge method

Voluntary participation of hemiplegic patients is crucial for functional electrical stimulation therapy.A wearable functional electrical stimulation system has been proposed for real-time volitional hand motor function control using the electromyography bridge method.Through a series of novel design concepts,including the integration of a detecting circuit and an analog-to-digital converter,a miniaturized functional electrical stimulation circuit technique,a low-power super-regeneration chip for wireless receiving,and two wearable armbands,a prototype system has been established with reduced size,power,and overall cost.Based on wrist joint torque reproduction and classification experiments performed on six healthy subjects,the optimized surface electromyography thresholds and trained logistic regression classifier parameters were statistically chosen to establish wrist and hand motion control with high accuracy.Test results showed that wrist flexion/extension,hand grasp,and finger extension could be reproduced with high accuracy and low latency.This system can build a bridge of information transmission between healthy limbs and paralyzed limbs,effectively improve voluntary participation of hemiplegic patients,and elevate efficiency of rehabilitation training.

基于自抗扰的永磁同步电机附加谐波损耗抑制方法

针对永磁同步电机在变频器供电时,由时间电流谐波所引起的附加谐波损耗过大及难以在电机初始设计时被考虑到的问题,采用场路耦合联合仿真模型来计算电机的附加谐波损耗,并以4台现有的表贴式永磁同步电机为例,通过实验验证了场路耦合联合仿真模型的有效性,为电机设计之初附加谐波损耗的选取,以及后续温升的计算提供了前期计算的方法。同时提出一种基于自抗扰技术的附加谐波损耗抑制方法,设计一种适用于永磁同步电机矢量控制的自抗扰控制器,并从理论上验证了自抗扰控制器对于时间电流谐波的抑制作用,以及针对自抗扰控制器参数众多调参困难的问题,给出一种参数整定方案。最后通过引入所设计的自抗扰控制器,对电机的时间电流谐波进行计算和分析,使电机的附加谐波损耗降低了68.1%,为同类型电机的附加谐波损耗抑制提供了一种有效的方法。

贯穿实验过程的电路实验考核评价方法

线上线下协同的多时间尺度实践教学是提高学生实践能动性和工程创新能力的有效措施。基于电路实验线上线下协同多维度、多时间尺度的实验教学内容和多空间、多时间尺度的教学模式,以学生实践能力和综合素质培养为目标,合理设计贯穿每个实验过程的多维度实验考核评价内容,提炼每个实验项目的课前-课中-课后的考核评价指标和量化各项指标的梯度权重,提出贯穿实验过程的电路实验考核评价方法,全面、科学地评价学生该门课程的综合成绩。该考核评价方法推动了电路实验教学的改革,提高了教与学的质量和效率,培养了学生的创新能力。

适用小样本的并网光伏阵列故障诊断方法

该文提出一种适用小样本的并网光伏阵列故障诊断方法。首先,使用光伏阵列的稳态输出电信号时间序列构建特征向量,论证该特征向量可以表征正常、开路故障、短路故障、阴影等不同状态。其次,针对光伏阵列运行环境多变的情况,提出一种将实际气象条件下光伏阵列输出值转换到统一工况下的数据处理方法。然后,为适用小样本情况,将线性判别分析方法与有偏差的协方差估计、公共奇异值分解相结合,解决样本高维低量导致的样本协方差矩阵估计奇异和判别函数求解困难的问题。最后,在上海市某高校楼顶搭建实验平台,采集光伏阵列不同状态下的实验数据,验证了所提数据处理方法对使用稳态电信号的必要性,及该故障分类算法在小样本场景中的有效性。

海上柔直选相合闸操作计算验证及工程应用研究

文中阐述了在完成海上柔性直流系统送电过程中,防止变压器励磁涌流造成送电失败而采用选相合闸措施。为保证选相操作顺利实施,通过变压器励磁涌流仿真计算,明确变压器涌流在最大允许限值时,断路器允许的动作时间最大偏离值,通过试验验证,确认影响断路器合闸操作时间分散性因素和范围。根据以上计算和验证结果,根据断路器空置时间分散性试验,选用多次关合时间中间值作为最终参数,减小了断路器机械及电气分散性的影响,使得实际运行考核中,变压器励磁涌流得到有效抑制,可为后续海上柔性直流选相合闸装置、断路器动作特性、变压器励磁涌流的配合及控制策略提供参考。

基于环形游标时间数字转换器的编码转换电路

基于应用在锁相环的环形游标时间数字转换器(Vernier ring time-to-digital converter,VRTDC),提出了一种温度计码编码转换电路,解决了VRTDC电路在小量程计数时输出电路无法输出准确的码值,导致时间间隔错误的输出量化问题。采用Cadence Spectre仿真工具在标准180 nm CMOS混合信号工艺下对编码转换电路进行验证,验证结论表明该VRTDC可输出正确的编码值,有效分辨率可达10 ps、动态范围可达560 ns,且在测量范围内具有很好的线性度。

Dynamic modeling and analysis of the closed-circuit grinding-classification process

Mathematical models of the grinding process are the basis of analysis, simulation and control. Most existent models in- cluding theoretical models and identification models are, however, inconvenient for direct analysis. In addition, many models pay much attention to the local details in the closed-circuit grinding process while overlooking the systematic behavior of the process as a whole. From the systematic perspective, the dynamic behavior of the whole closed-circuit grinding-classification process is consid- ered and a first-order transfer function model describing the dynamic relation between the raw material and the product is established. The model proves that the time constant of the closed-circuit process is lager than that of the open-circuit process and reveals how physical parameters affect the process dynamic behavior. These are very helpful to understand, design and control the closed-circuit grinding-classification process.