Design of Hybrid True Random Number Generator for Cryptographic Applications

In real-time applications,unpredictable random numbers play a major role in providing cryptographic and encryption processes.Most of the existing random number generators are embedded with the complex nature of an amplifier,ring oscillators,or comparators.Hence,this research focused more on implementing a Hybrid Nature of a New Random Number Generator.The key objective of the proposed methodology relies on the utilization of True random number generators.The randomness is unpredictable.The additions of programmable delay lines will reduce the processing time and maintain the quality of randomizing.The performance comparisons are carried out with power,delay,and lookup table.The proposed architecture was executed and verified using Xilinx.The Hybrid TRNG is evaluated under simulation and the obtained results outperform the results of the conventional random generators based on Slices,area and Lookup Tables.The experimental observations show that the proposed Hybrid True Random Number Generator(HTRNG)offers high operating speed and low power consumption.

True Random Number Generator Realized by Extracting Entropy from a Negative-Inductance Superconducting Quantum Interference Device

A new type of superconductive true random number generator (TRNG) based on a negative-inductance superconducting quantum interference device (nSQUID) is proposed. The entropy harnessed to generate random numbers comes from the phenomenon of symmetry breaking in the nSQUID. The experimental circuit is fabricated by the Nb-based lift-off process. Low-temperature tests of the circuit verify the basic function of the proposed TRNG. The frequency characteristics of the TRNG have been analyzed by simulation. The generation rate of random numbers is expected to achieve hundreds of megahertz to tens of gigahertz.

A high-speed true random number generator based on Ag/SiNx/n-Si memristor

The intrinsic variability of memristor switching behavior can be used as a natural source of randomness,this variability is valuable for safe applications in hardware,such as the true random number generator(TRNG).However,the speed of TRNG is still be further improved.Here,we propose a reliable Ag/SiNx/n-Si volatile memristor,which exhibits a typical threshold switching device with stable repeat ability and fast switching speed.This volatile-memristor-based TRNG is combined with nonlinear feedback shift register(NFSR)to form a new type of high-speed dual output TRNG.Interestingly,the bit generation rate reaches a high speed of 112 kb/s.In addition,this new TRNG passed all 15 National Institute of Standards and Technology(NIST)randomness tests without post-processing steps,proving its performance as a hardware security application.This work shows that the SiNx-based volatile memristor can realize TRNG and has great potential in hardware network security.

Parameter analysis of chaotic superlattice true random number source

Superlattices in chaotic state can be used as a key part of a true random number generator. The chaotic characteristics of the signal generated in the superlattice are mostly affected by the parameters of the superlattice and the applied voltage, while the latter is easier to adjust. In this paper, the model of the superlattice is first established. Then, based on this model, the chaotic characteristics of the generated signal are studied under different voltages. The results demonstrate that the onset of chaos in the superlattice is typically accompanied by the mergence of multistability, and there are voltage intervals in each of which the generated signal is chaotic.

A hybrid-type quantum random number generator

This paper proposes a well-performing hybrid-type truly quantum random number generator based on the time interval between two independent single-photon detection signals, which is practical and intuitive, and generates the initial random number sources from a combination of multiple existing random number sources. A time-to-amplitude converter and multichannel analyzer are used for qualitative analysis to demonstrate that each and every step is random. Furthermore, a carefully designed data acquisition system is used to obtain a high-quality random sequence. Our scheme is simple and proves that the random number bit rate can be dramatically increased to satisfy practical requirements.

LETRNG—A Lightweight and Efficient True Random Number Generator for GNU/Linux Systems

Unpredictable and irreproducible digital keys are required to modulate security-related information in secure communication systems.True random number generators(TRNGs)rather than pseudorandom number generators(PRNGs)are required for the highest level of security.TRNG is a significant component in the digital security realm for extracting unpredictable binary bitstreams.Presently,most TRNGs extract high-quality“noise”from unpredictable physical random phenomena.Thus,these applications must be equipped with external hardware for collecting entropy and converting them into a random digital sequence.This study introduces a lightweight and efficient true random number generator(LETRNG)that uses the inherent randomness of a central processing unit(CPU)and an operating system(OS)as the source of entropy.We then utilize a lightweight post-processing method based on XOR and fair coin operation to generate an unbiased random binary sequence.Evaluations based on two famous test suites(NIST and ENT)show that LETRNG is perfectly capable of generating high-quality random numbers suitable for various GNU/Linux systems.

Ensuring Quality of Random Numbers from TRNG: Design and Evaluation of Post-Processing Using Genetic Algorithm

Random numbers generated by pseudo-random and true random number generators (TRNG) are used in a wide variety of important applications. A TRNG relies on a non-deterministic source to sample random numbers. In this paper, we improve the post-processing stage of TRNGs using a heuristic evolutionary algorithm. Our post-processing algorithm decomposes the problem of improving the quality of random numbers into two phases: (i) Exact Histogram Equalization: it modifies the random numbers distribution with a specified output distribution;(ii) Stationarity Enforcement: using genetic algorithms, the output of (ii) is permuted until the random numbers meet wide-sense stationarity. We ensure that the quality of the numbers generated from the genetic algorithm is within a specified level of error defined by the user. We parallelize the genetic algorithm for improved performance. The post-processing is based on the power spectral density of the generated numbers used as a metric. We propose guideline parameters for the evolutionary algorithm to ensure fast convergence, within the first 100 generations, with a standard deviation over the specified quality level of less than 0.45. We also include a TestU01 evaluation over the random numbers generated.

Design and validation of high speed true random number generators based on prime-length ring oscillators

This paper presents a wide supply voltage range, high speed true random number generator（TRNG） based on ring oscillators, which have different prime number of inverters. And a simple Von Neumann corrector as post processing is also realized to improve data randomness. Prototypes have been implemented and fabricated in 0.18 μm complementary metal oxide semiconductor（CMOS） technology with a wide range of supply voltage from 1.8 V to 3.6 V. The circuit occupies 4 500 μm2, and dissipates minimum 160 μW of power with sampling frequency of 20 MHz. Output bit rate range is from 100 kbit/s to 20 Mbit/s. Statistical test results, which were achieved from the die Hard battery of tests, demonstrate that output random numbers have a well characteristic of randomness.

Construction and Optimization of TRNG Based Substitution Boxes for Block Encryption Algorithms

Internet of Things is an ecosystem of interconnected devices that are accessible through the internet.The recent research focuses on adding more smartness and intelligence to these edge devices.This makes them susceptible to various kinds of security threats.These edge devices rely on cryptographic techniques to encrypt the pre-processed data collected from the sensors deployed in the field.In this regard,block cipher has been one of the most reliable options through which data security is accomplished.The strength of block encryption algorithms against different attacks is dependent on its nonlinear primitive which is called Substitution Boxes.For the design of S-boxes mainly algebraic and chaos-based techniques are used but researchers also found various weaknesses in these techniques.On the other side,literature endorse the true random numbers for information security due to the reason that,true random numbers are purely non-deterministic.In this paper firstly a natural dynamical phenomenon is utilized for the generation of true random numbers based S-boxes.Secondly,a systematic literature review was conducted to know which metaheuristic optimization technique is highly adopted in the current decade for the optimization of S-boxes.Based on the outcome of Systematic Literature Review(SLR),genetic algorithm is chosen for the optimization of s-boxes.The results of our method validate that the proposed dynamic S-boxes are effective for the block ciphers.Moreover,our results showed that the proposed substitution boxes achieve better cryptographic strength as compared with state-of-the-art techniques.

Low Area PRESENT Cryptography in FPGA Using TRNG-PRNG Key Generation

Lightweight Cryptography(LWC)is widely used to provide integrity,secrecy and authentication for the sensitive applications.However,the LWC is vulnerable to various constraints such as high-power consumption,time consumption,and hardware utilization and susceptible to the malicious attackers.In order to overcome this,a lightweight block cipher namely PRESENT architecture is proposed to provide the security against malicious attacks.The True Random Number Generator-Pseudo Random Number Generator(TRNG-PRNG)based key generation is proposed to generate the unpredictable keys,being highly difficult to predict by the hackers.Moreover,the hardware utilization of PRESENT architecture is optimized using the Dual port Read Only Memory(DROM).The proposed PRESENT-TRNGPRNG architecture supports the 64-bit input with 80-bit of key value.The performance of the PRESENT-TRNG-PRNG architecture is evaluated by means of number of slice registers,flip flops,number of slices Look Up Table(LUT),number of logical elements,slices,bonded input/output block(IOB),frequency,power and delay.The input retrieval performances analyzed in this PRESENT-TRNG-PRNG architecture are Peak Signal to Noise Ratio(PSNR),Structural Similarity Index(SSIM)and Mean-Square Error(MSE).The PRESENT-TRNG-PRNG architecture is compared with three different existing PRESENT architectures such as PRESENT On-TheFly(PERSENT-OTF),PRESENT Self-Test Structure(PRESENT-STS)and PRESENT-Round Keys(PRESENT-RK).The operating frequency of the PRESENT-TRNG-PRNG is 612.208 MHz for Virtex 5,which is high as compared to the PRESENT-RK.

A New Approach for the DFT NIST Test Applicable for Non-Stationary Input Sequences

The National Institute of Standards and Technology (NIST) document is a list of fifteen tests for estimating the probability of signal randomness degree. Test number six in the NIST document is the Discrete Fourier Transform (DFT) test suitable for stationary incoming sequences. But, for cases where the input sequence is not stationary, the DFT test provides inaccurate results. For these cases, test number seven and eight (the Non-overlapping Template Matching Test and the Overlapping Template Matching Test) of the NIST document were designed to classify those non-stationary sequences. But, even with test number seven and eight of the NIST document, the results are not always accurate. Thus, the NIST test does not give a proper answer for the non-stationary input sequence case. In this paper, we offer a new algorithm or test, which may replace the NIST tests number six, seven and eight. The proposed test is applicable also for non-stationary sequences and supplies more accurate results than the existing tests (NIST tests number six, seven and eight), for non-stationary sequences. The new proposed test is based on the Wigner function and on the Generalized Gaussian Distribution (GGD). In addition, this new proposed algorithm alarms and indicates on suspicious places of cyclic sections in the tested sequence. Thus, it gives us the option to repair or to remove the suspicious places of cyclic sections (this part is beyond the scope of this paper), so that after that, the repaired or the shortened sequence (original sequence with removed sections) will result as a sequence with high probability of random degree.

Implementing hardware primitives based on memristive spatiotemporal variability into cryptography applications

Implementing hardware primitives into cryptosystem has become a new trend in electronic community.Memristor,with intrinsic stochastic characteristics including the switching voltages,times and energies,as well as the fluctuations of the resistance state over time,could be a naturally good entropy source for cryptographic key generation.In this study,based on kinetic Monte Carlo Simula-tion,multiple Artificial Intelligence techniques,as well as kernel density map and time constant analysis,memristive spatiotemporal variability within graphene based conductive bridging RAM(CBRAM)have been synergistically analyzed to verify the inher-ent randomness of the memristive stochasticity.Moreover,the ran-dom number based on hardware primitives passed the Hamming Distance calculation with high randomness and uniqueness,and has been integrated into a Rivest-Shamir-Adleman(RSA)cryptosystem.The security of the holistic cryptosystem relies both the modular arithmetic algorithm and the intrinsic randomness of the hardware primitive(to be more reliable,the random num-ber could be as large as possible,better larger than 2048 bits as NIST suggested).The spatiotemporal-variability-based random number is highly random,physically unpredictable and machinelearningattack resilient,improving the robustness of the entire cryptosystem.