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关于Turbo code解码器实现的几种方案 被引量:1
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作者 李景玉 贺秀峰 王华 《煤矿机械》 北大核心 2003年第8期61-64,共4页
介绍了Turbo码的基本结构 ,并从工程实现的角度提出了实现Turbo码解码器的几种方案 ,从DSP和FPGA实现以及使用专用芯片 (ASIC)几个方面进行了分析和比较 ,得出了随着Tur bo码应用的逐渐升温 。
关键词 turbo码解码器 DSP FPGA IPCORE
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Joint Source-Channel Decoding of EVRC Speech Encoder Using Residual Redundancy
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作者 阿哈麦德 尤肖虎 高西奇 《Journal of Southeast University(English Edition)》 EI CAS 2002年第2期103-107,共5页
The enhanced variable rate codec (EVRC) is a standard for the 'Speech ServiceOption 3 for Wideband Spread Spectrum Digital System,' which has been employed in both IS-95cellular systems and ANSI J-STC-008 PCS ... The enhanced variable rate codec (EVRC) is a standard for the 'Speech ServiceOption 3 for Wideband Spread Spectrum Digital System,' which has been employed in both IS-95cellular systems and ANSI J-STC-008 PCS (personal communications systems). This paper concentrateson channel decoders that exploit the residual redundancy inherent in the enhanced variable ratecodec bitstream. This residual redundancy is quantified by modeling the parameters as first orderMarkov chains and computing the entropy rate based on the relative frequencies of transitions.Moreover, this residual redundancy can be exploited by an appropriately 'tuned' channel decoder toprovide substantial coding gain when compared with the decoders that do not exploit it. Channelcoding schemes include convolutional codes, and iteratively decoded parallel concatenatedconvolutional 'turbo' codes. 展开更多
关键词 residual redundancy convolutional codes turbo codes
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