We report results of our optical photometric observations of ten gamma-ray loud blazers, namely: 0219+428 (3C66A), PKS 0420-014 (OA 129), S5 0716+714, 0754+100 (OI 090.4), 0827+243 (OJ248), 1652+398 (Mrk 501), 2200+42...We report results of our optical photometric observations of ten gamma-ray loud blazers, namely: 0219+428 (3C66A), PKS 0420-014 (OA 129), S5 0716+714, 0754+100 (OI 090.4), 0827+243 (OJ248), 1652+398 (Mrk 501), 2200+420 (BL Lacertae), 2230+114 (CTA 102), 2251+158 (3C 454.3) and 2344+514. The observations were carried out in September-October, 2000 using the 70 cm optical telescope at Abstumani Observatory, Georgia. We found intra-day variations in 0420-014, S5 0716+714, BL Lacertae and CTA 102. A variation of 0.3 magnitude over a time scale of about 3 hours was observed in the R passband in BL Lacertae on JD 2451827. We did not detect any variation in 3C 66A, Mrk 501, or 3C 454.3 during our observations. Nor did we detect any clear evidence of variation in 1ES 2344+514 during our two weeks' observing run of the TeV gamma-ray source.展开更多
This paper presents a transmit physical coding sublayer（PCS） circuit for 100 G Ethernet. Based on the4×25 Gb/s architecture according to the IEEE P802.3ba and IEEE P802.3bm-（TM）/D1.1 standards, this PCS circu...This paper presents a transmit physical coding sublayer（PCS） circuit for 100 G Ethernet. Based on the4×25 Gb/s architecture according to the IEEE P802.3ba and IEEE P802.3bm-（TM）/D1.1 standards, this PCS circuit is designed using a semi-custom design method and consists of 4 modules including 64B/66 B encoder, scrambler,multiple lanes distribution and 66 ： 8 gearbox. By using the pipeline structure and several optimization techniques,the working speed of the circuit is increased significantly. The parallel scrambling combined with logic optimization also improve the performance. In addition, a kind of phase-independent structure is employed in the design of the gearbox to ensure it can work stably and reliably at high frequency. This PCS circuit has been fabricated based on0.18μm CMOS technology and the total area is 1.7×1.7 mm^2. Measured results show that the circuit can work properly at 100 Gb/s and the power consumption is about 284 m W with a 1.8 V supply.展开更多
基金Supported by the National Natural Science Foundation of China
文摘We report results of our optical photometric observations of ten gamma-ray loud blazers, namely: 0219+428 (3C66A), PKS 0420-014 (OA 129), S5 0716+714, 0754+100 (OI 090.4), 0827+243 (OJ248), 1652+398 (Mrk 501), 2200+420 (BL Lacertae), 2230+114 (CTA 102), 2251+158 (3C 454.3) and 2344+514. The observations were carried out in September-October, 2000 using the 70 cm optical telescope at Abstumani Observatory, Georgia. We found intra-day variations in 0420-014, S5 0716+714, BL Lacertae and CTA 102. A variation of 0.3 magnitude over a time scale of about 3 hours was observed in the R passband in BL Lacertae on JD 2451827. We did not detect any variation in 3C 66A, Mrk 501, or 3C 454.3 during our observations. Nor did we detect any clear evidence of variation in 1ES 2344+514 during our two weeks' observing run of the TeV gamma-ray source.
基金Project supported by the National Natural Science Foundation of China(No.6504000129)the National Basic Research Program of China(No.6504000052)
文摘This paper presents a transmit physical coding sublayer（PCS） circuit for 100 G Ethernet. Based on the4×25 Gb/s architecture according to the IEEE P802.3ba and IEEE P802.3bm-（TM）/D1.1 standards, this PCS circuit is designed using a semi-custom design method and consists of 4 modules including 64B/66 B encoder, scrambler,multiple lanes distribution and 66 ： 8 gearbox. By using the pipeline structure and several optimization techniques,the working speed of the circuit is increased significantly. The parallel scrambling combined with logic optimization also improve the performance. In addition, a kind of phase-independent structure is employed in the design of the gearbox to ensure it can work stably and reliably at high frequency. This PCS circuit has been fabricated based on0.18μm CMOS technology and the total area is 1.7×1.7 mm^2. Measured results show that the circuit can work properly at 100 Gb/s and the power consumption is about 284 m W with a 1.8 V supply.
