An ultra-low quiescent current low-dropout regulator with small output voltage variations and improved load regulation is presented in this paper. It makes use of dynamically-biased shunt feedback as the buffer stage ...An ultra-low quiescent current low-dropout regulator with small output voltage variations and improved load regulation is presented in this paper. It makes use of dynamically-biased shunt feedback as the buffer stage and the LDO regulator can be stable for all load conditions. The proposed structure also employs a momentarily current-boosting circuit to reduce the output voltage to the normal value when output is switched from full load to no load. The whole circuit is designed in a 0.18 μm CMOS technology with a quiescent current of 550 nA. The maximum output voltage variation is less than 20 mV when used with 1 μF external capacitor.展开更多
介绍了一种采用0.35μm CMOS工艺制作的LDO电路。电路采用工作在亚阈值区的跨导放大器使得电路工作在超低静态电流下,因此实现了超低静态功耗和高效率性能。整个电路所占面积约为0.8 mm2,在典型工作状态下电路总的静态电流约为500 n A,...介绍了一种采用0.35μm CMOS工艺制作的LDO电路。电路采用工作在亚阈值区的跨导放大器使得电路工作在超低静态电流下,因此实现了超低静态功耗和高效率性能。整个电路所占面积约为0.8 mm2,在典型工作状态下电路总的静态电流约为500 n A,最大负载电流为150 m A。电路输入电压为3.3 V^5 V,输出电压为3 V。展开更多
文摘An ultra-low quiescent current low-dropout regulator with small output voltage variations and improved load regulation is presented in this paper. It makes use of dynamically-biased shunt feedback as the buffer stage and the LDO regulator can be stable for all load conditions. The proposed structure also employs a momentarily current-boosting circuit to reduce the output voltage to the normal value when output is switched from full load to no load. The whole circuit is designed in a 0.18 μm CMOS technology with a quiescent current of 550 nA. The maximum output voltage variation is less than 20 mV when used with 1 μF external capacitor.
文摘介绍了一种采用0.35μm CMOS工艺制作的LDO电路。电路采用工作在亚阈值区的跨导放大器使得电路工作在超低静态电流下,因此实现了超低静态功耗和高效率性能。整个电路所占面积约为0.8 mm2,在典型工作状态下电路总的静态电流约为500 n A,最大负载电流为150 m A。电路输入电压为3.3 V^5 V,输出电压为3 V。