In this study, we developed a multi-channel lownoise electronic readout system for a silicon strip detector.Using two charge-sensitive amplifier VA140 chips from IDEAS in Norway, the system has a wide linear dynamic i...In this study, we developed a multi-channel lownoise electronic readout system for a silicon strip detector.Using two charge-sensitive amplifier VA140 chips from IDEAS in Norway, the system has a wide linear dynamic input range of up to 180 fC for 128 channels with 0.16 fC average equivalent noise charge. In addition, we studied the charge distribution behaviors between adjacent silicon strips with the help of transient current technology.展开更多
A readout electronics system used for space cosmic-ray charge measurement for multi-channel silicon detectors is introduced in this paper, including performance measurements. A 64-channel charge sensitive ASIC （VA140...A readout electronics system used for space cosmic-ray charge measurement for multi-channel silicon detectors is introduced in this paper, including performance measurements. A 64-channel charge sensitive ASIC （VA140） from the IDEAS company is used. With its features of low power consumption, low noise, large dynamic range, and high integration, it can be used in future particle detecting experiments based on silicon detectors.展开更多
A scalable readout system （SRS） is designed to provide a general solution for different micro-pattern gas detectors in various applications. The system mainly consists of three kinds of modules： the ASIC card, the ...A scalable readout system （SRS） is designed to provide a general solution for different micro-pattern gas detectors in various applications. The system mainly consists of three kinds of modules： the ASIC card, the adapter card and the front-end card （FEC）. The ASIC cards, mounted with particular ASIC chips, are designed for receiving detector signals. The adapter card is in charge of digitizing the output signals from several ASIC cards. The FEC, edged-mounted with the adapter, has field-programmable gate array （FPGA）-based reconfigurable logic and I/O interfaces, allowing users to choose different ASIC cards and adapters for different experiments, which expands the system to various applications. The FEC transfers data through Gigabit Ethernet protocol realized by a TCP processor （SiTCP） IP core in FPGA. By assembling a flexible number of FECs in parallel through Gigabit Ethernet, the readout system can be tailored to specific sizes to adapt to the experiment scales and readout requirements. In this paper, two kinds of multi-channel ASIC chip, VA140 and AGET, are applied to verify the scalability of this SRS architecture. Based on this VA140 or AGET SRS, one FEC covers 8 ASIC （VA140） cards handling 512 detector channels, or 4 ASIC （AGET） cards handling 256 detector channels, respectively. More FECs can be assembled in crates to handle thousands of detector channels.展开更多
The Silicon Tracker （STK） is one of the detectors of the DAMPE satellite used to measure the incidence direction of high energy cosmic rays. It consists of 6 X-Y double layers of silicon micro-strip detectors with 7...The Silicon Tracker （STK） is one of the detectors of the DAMPE satellite used to measure the incidence direction of high energy cosmic rays. It consists of 6 X-Y double layers of silicon micro-strip detectors with 73728 readout channels. It is a great challenge to read out the channels and process the huge volume of data in the harsh environment of space. 1152 Application Specific Integrated Circuits （ASIC） and 384 ADCs are used to read out the detector channels. 192 Tracker Front-end Hybrid （TFH） modules and 8 identical Tracker Readout Board （TRB） modules are designed to control and digitalize the front signals. In this paper, the design of the readout electronics for the STK and its performance are presented in detail.展开更多
基金supported by the National Natural Science Funds of China(Nos.11622327 and U1831206)Youth Innovation Promotion Association of the Chinese Academy of Sciences(No.2014275)Strategic Pioneer Program on Space Science of the Chinese Academy of Sciences(No.XDA15010200)
文摘In this study, we developed a multi-channel lownoise electronic readout system for a silicon strip detector.Using two charge-sensitive amplifier VA140 chips from IDEAS in Norway, the system has a wide linear dynamic input range of up to 180 fC for 128 channels with 0.16 fC average equivalent noise charge. In addition, we studied the charge distribution behaviors between adjacent silicon strips with the help of transient current technology.
基金the DAMPE project of the Chinese Strategic Priority Research Program in Space Science
文摘A readout electronics system used for space cosmic-ray charge measurement for multi-channel silicon detectors is introduced in this paper, including performance measurements. A 64-channel charge sensitive ASIC （VA140） from the IDEAS company is used. With its features of low power consumption, low noise, large dynamic range, and high integration, it can be used in future particle detecting experiments based on silicon detectors.
基金Supported by National Natural Science Foundation of China(11222552)
文摘A scalable readout system （SRS） is designed to provide a general solution for different micro-pattern gas detectors in various applications. The system mainly consists of three kinds of modules： the ASIC card, the adapter card and the front-end card （FEC）. The ASIC cards, mounted with particular ASIC chips, are designed for receiving detector signals. The adapter card is in charge of digitizing the output signals from several ASIC cards. The FEC, edged-mounted with the adapter, has field-programmable gate array （FPGA）-based reconfigurable logic and I/O interfaces, allowing users to choose different ASIC cards and adapters for different experiments, which expands the system to various applications. The FEC transfers data through Gigabit Ethernet protocol realized by a TCP processor （SiTCP） IP core in FPGA. By assembling a flexible number of FECs in parallel through Gigabit Ethernet, the readout system can be tailored to specific sizes to adapt to the experiment scales and readout requirements. In this paper, two kinds of multi-channel ASIC chip, VA140 and AGET, are applied to verify the scalability of this SRS architecture. Based on this VA140 or AGET SRS, one FEC covers 8 ASIC （VA140） cards handling 512 detector channels, or 4 ASIC （AGET） cards handling 256 detector channels, respectively. More FECs can be assembled in crates to handle thousands of detector channels.
文摘The Silicon Tracker （STK） is one of the detectors of the DAMPE satellite used to measure the incidence direction of high energy cosmic rays. It consists of 6 X-Y double layers of silicon micro-strip detectors with 73728 readout channels. It is a great challenge to read out the channels and process the huge volume of data in the harsh environment of space. 1152 Application Specific Integrated Circuits （ASIC） and 384 ADCs are used to read out the detector channels. 192 Tracker Front-end Hybrid （TFH） modules and 8 identical Tracker Readout Board （TRB） modules are designed to control and digitalize the front signals. In this paper, the design of the readout electronics for the STK and its performance are presented in detail.
