Parallel Implementation of the CCSDS Turbo Decoder on GPU

This paper presents a software turbo decoder on graphics processing units(GPU).Unlike previous works,the proposed decoding architecture for turbo codes mainly focuses on the Consultative Committee for Space Data Systems(CCSDS)standard.However,the information frame lengths of the CCSDS turbo codes are not suitable for flexible sub-frame parallelism design.To mitigate this issue,we propose a padding method that inserts several bits before the information frame header.To obtain low-latency performance and high resource utilization,two-level intra-frame parallelisms and an efficient data structure are considered.The presented Max-Log-Map decoder can be adopted to decode the Long Term Evolution(LTE)turbo codes with only small modifications.The proposed CCSDS turbo decoder at 10 iterations on NVIDIA RTX3070 achieves about 150 Mbps and 50Mbps throughputs for the code rates 1/6 and 1/2,respectively.

Quantized Decoders that Maximize Mutual Information for Polar Codes

In this paper,we innovatively associate the mutual information with the frame error rate(FER)performance and propose novel quantized decoders for polar codes.Based on the optimal quantizer of binary-input discrete memoryless channels(BDMCs),the proposed decoders quantize the virtual subchannels of polar codes to maximize mutual information(MMI)between source bits and quantized symbols.The nested structure of polar codes ensures that the MMI quantization can be implemented stage by stage.Simulation results show that the proposed MMI decoders with 4 quantization bits outperform the existing nonuniform quantized decoders that minimize mean-squared error(MMSE)with 4 quantization bits,and yield even better performance than uniform MMI quantized decoders with 5 quantization bits.Furthermore,the proposed 5-bit quantized MMI decoders approach the floating-point decoders with negligible performance loss.

基于encoder-decoder框架的城镇污水厂出水水质预测

由于污水厂的出水水质指标繁多、污水处理过程中反应复杂、时序非线性程度高,基于机理模型的预测方法无法取得理想效果。针对此问题,提出基于深度学习的污水厂出水水质预测方法,并以吉林省某污水厂监测水质为来源数据,利用多种结合encoder-decoder结构的神经网络预测水质。结果显示,所提结构对LSTM和GRU网络预测能力都有一定提升,对长期预测能力提升更加显著,ED-GRU模型效果最佳,短期预测中的4个出水水质指标均方根误差(RMSE)为0.7551、0.2197、0.0734、0.3146,拟合优度(R2)为0.9013、0.9332、0.9167、0.9532,可以预测出水质局部变化,而长期预测中的4个指标RMSE为1.7204、1.7689、0.4478、0.8316,R2为0.4849、0.5507、0.4502、0.7595,可以预测出水质变化趋势,与顺序结构相比,短期预测RMSE降低10%以上,R2增加2%以上,长期预测RMSE降低25%以上,R2增加15%以上。研究结果表明,基于encoder-decoder结构的神经网络可以对污水厂出水水质进行准确预测,为污水处理工艺改进提供技术支撑。

基于时空特征融合的Encoder-Decoder多步4D短期航迹预测

航迹预测在确保空中交通安全、高效运行中扮演着至关重要的角色。所预测的航迹信息是航迹优化、冲突告警等决策工具的输入,而预测准确性取决于模型对航迹序列特征的提取能力。航迹序列数据是具有丰富时空特征的多维时间序列,其中每个变量都呈现出长短期的时间变化模式,并且这些变量之间还存在着相互依赖的空间信息。为了充分提取这种时空特征,本文提出了基于融合时空特征的编码器-解码器(Spatio-Temporal EncoderDecoder,STED)航迹预测模型。在Encoder中使用门控循环单元(Gated Recurrent Unit,GRU)、卷积神经网络(Convolutional Neural Network,CNN)和注意力机制(Attention,AT)构成的双通道网络来分别提取航迹时空特征,Decoder对时空特征进行拼接融合,并利用GRU对融合特征进行学习和递归输出,实现对未来多步航迹信息的预测。利用真实的航迹数据对算法性能进行验证,实验结果表明,所提STED网络模型能够在未来10 min预测范围内进行高精度的短期航迹预测,相比于LSTM、CNN-LSTM和AT-LSTM等数据驱动航迹预测模型具有更高的精度。此外,STED网络模型预测一个航迹点平均耗时为0.002 s,具有良好的实时性。

基于Encoder-Decoder注意力网络的异常驾驶行为在线识别方法

异常驾驶行为是车辆安全运行的重大威胁,其对人员与物资的安全高效投送造成严重危害。以低成本非接触式的手机多传感器数据为基础,通过对驾驶行为特性进行数据分析,提出一种融合Encoder-Decoder深度网络与Attention机制的异常驾驶行为的在线识别方法。该方法由基于LSTM(long short-term memory)的Encoder-Decoder、Attention机制与基于SVM(support vector machine)的分类器3个模块构成。该系统识别方法包括:输入编码、注意力学习、特征解码、序列重构、残差计算与驾驶行为分类等6个步骤。该技术方法利用自然驾驶条件下所采集的手机传感器数据进行实验。实验结果表明:①手机多传感器数据融合方法对驾驶行为识别具备有效性;②异常驾驶行为必然会造成数据异常波动;③Attention机制有助于提升模型学习效果,对所提出模型的识别准确率F1-score为0.717,与经典同类模型比较,准确率得到显著提升;④对于汽车异常驾驶行为来说,SVM比Logistic与随机森林算法具有更优越的识别效果。

利用Encoder-Decoder框架的深度学习网络实现绕射波分离及成像

利用单纯绕射波场实现地下地质异常体的识别具有坚实的理论基础,对应的实施方法得到了广泛研究,且有效地应用于实际勘探。但现有技术在微小尺度异常体成像方面收效甚微,相关研究多数以射线传播理论为基础,对于影响绕射波分离成像精度的因素分析并不完备。相较于反射波,由于存在不连续构造而产生的绕射波能量微弱并且相互干涉,同时环境干扰使得绕射波进一步湮没。因此,更高精度的波场分离及单独成像是现阶段基于绕射波超高分辨率处理、解释的重点研究方向。为此,首先针对地球物理勘探中地质异常体的准确定位,以携带高分辨率信息的绕射波为研究对象,系统分析在不同尺度、不同物性参数的异常体情况下绕射波的能量大小及形态特征,掌握绕射波与其他类型波叠加的具体形式;然后根据相应特征性质提出基于深度学习技术的绕射波分离成像方法,即利用Encoder-Decoder框架的空洞卷积网络捕获绕射波场特征,从而实现绕射波分离,基于速度连续性原则构建单纯绕射波场的偏移速度模型并完成最终成像。数据测试表明,该方法最终可满足微小地质异常体高精度识别的需求。

Unifying Convolution and Transformer Decoder for Textile Fiber Identification

At present,convolutional neural networks(CNNs)and transformers surpass humans in many situations(such as face recognition and object classification),but do not work well in identifying fibers in textile surface images.Hence,this paper proposes an architecture named FiberCT which takes advantages of the feature extraction capability of CNNs and the long-range modeling capability of transformer decoders to adaptively extract multiple types of fiber features.Firstly,the convolution module extracts fiber features from the input textile surface images.Secondly,these features are sent into the transformer decoder module where label embeddings are compared with the features of each type of fibers through multi-head cross-attention and the desired features are pooled adaptively.Finally,an asymmetric loss further purifies the extracted fiber representations.Experiments show that FiberCT can more effectively extract the representations of various types of fibers and improve fiber identification accuracy than state-of-the-art multi-label classification approaches.

A Denoiser for Correlated Noise Channel Decoding: Gated-Neural Network

This letter proposes a sliced-gated-convolutional neural network with belief propagation(SGCNN-BP) architecture for decoding long codes under correlated noise. The basic idea of SGCNNBP is using Neural Networks(NN) to transform the correlated noise into white noise, setting up the optimal condition for a standard BP decoder that takes the output from the NN. A gate-controlled neuron is used to regulate information flow and an optional operation—slicing is adopted to reduce parameters and lower training complexity. Simulation results show that SGCNN-BP has much better performance(with the largest gap being 5dB improvement) than a single BP decoder and achieves a nearly 1dB improvement compared to Fully Convolutional Networks(FCN).

A highly reliable encoding and decoding communication framework based on semantic information

Increasing research has focused on semantic communication,the goal of which is to convey accurately the meaning instead of transmitting symbols from the sender to the receiver.In this paper,we design a novel encoding and decoding semantic communication framework,which adopts the semantic information and the contextual correlations between items to optimize the performance of a communication system over various channels.On the sender side,the average semantic loss caused by the wrong detection is defined,and a semantic source encoding strategy is developed to minimize the average semantic loss.To further improve communication reliability,a decoding strategy that utilizes the semantic and the context information to recover messages is proposed in the receiver.Extensive simulation results validate the superior performance of our strategies over state-of-the-art semantic coding and decoding policies on different communication channels.

Improved Segmented Belief Propagation List Decoding for Polar Codes with Bit-Flipping

Belief propagation list(BPL) decoding for polar codes has attracted more attention due to its inherent parallel nature. However, a large gap still exists with CRC-aided SCL(CA-SCL) decoding.In this work, an improved segmented belief propagation list decoding based on bit flipping(SBPL-BF) is proposed. On the one hand, the proposed algorithm makes use of the cooperative characteristic in BPL decoding such that the codeword is decoded in different BP decoders. Based on this characteristic, the unreliable bits for flipping could be split into multiple subblocks and could be flipped in different decoders simultaneously. On the other hand, a more flexible and effective processing strategy for the priori information of the unfrozen bits that do not need to be flipped is designed to improve the decoding convergence. In addition, this is the first proposal in BPL decoding which jointly optimizes the bit flipping of the information bits and the code bits. In particular, for bit flipping of the code bits, a H-matrix aided bit-flipping algorithm is designed to enhance the accuracy in identifying erroneous code bits. The simulation results show that the proposed algorithm significantly improves the errorcorrection performance of BPL decoding for medium and long codes. It is more than 0.25 d B better than the state-of-the-art BPL decoding at a block error rate(BLER) of 10^(-5), and outperforms CA-SCL decoding in the low signal-to-noise(SNR) region for(1024, 0.5)polar codes.

基于GRU Encoder-decoder和注意力机制的RUL预测方法

深度学习模型可直接建立机械设备的状态与剩余使用寿命(RUL)之间的映射关系,从而避免人工提取特征和建立健康指标的过程。文中基于深度学习理论,提出一种基于注意力机制和时序编码解码器(Encoder-decoder)相结合的RUL预测方法。首先,基于门控循环神经网络(GRU)构建一个时序编码解码器以实现输入序列的重构,其中GRU-Encoder对输入的多元时间序列进行编码;再引入注意力机制对GRU-Encoder在每个时刻的输出向量进行加权融合,以融合后的向量作为编码结果,并将其输入到GRU-Decoder中实现输入序列的重构,同时将编码结果映射为输入样本的RUL。采用CMAPSS数据集对所提方法的有效性进行验证,结果表明,该方法预测精度较高,可行且有效。

The"Decoding Zhonghua"International Conference on Dialogue among Civilisations Held in Beijing

The"Decoding Zhonghua"International Conference on Dialogue among Civilisations,hosted by China International Public Relations Association,China Ethnic News and Academy of Contemporary China and World Studies was held in Beijing on January 17th.With the theme"Pursing Harmonious Coexistence of Civilisations through Dialogue".

基于Encoder-Decoder-ILSTM模型的瓦斯浓度预测研究

近年来,神经网络在各领域均发挥了巨大作用,同样在煤矿瓦斯浓度预测当中也有应用。为了提高模型的预测精度和实时性,结合Encoder-Decoder结构、长短期记忆形成、蛇优化算法提出了一种新的神经网络,为促进煤矿安全生产提供了技术支持。

Area optimization of parallel Chien search architecture for Reed-Solomon(255,239) decoder

A global optimization algorithm （GOA） for parallel Chien search circuit in Reed-Solomon （RS） （255,239） decoder is presented. By finding out the common modulo 2 additions within groups of Galois field （GF） multipliers and pre-computing the common items, the GOA can reduce the number of XOR gates efficiently and thus reduce the circuit area. Different from other local optimization algorithms, the GOA is a global one. When there are more than one maximum matches at a time, the best match choice in the GOA has the least impact on the final result by only choosing the pair with the smallest relational value instead of choosing a pair randomly. The results show that the area of parallel Chien search circuits can be reduced by 51% compared to the direct implementation when the group-based GOA is used for GF multipliers and by 26% if applying the GOA to GF multipliers separately. This optimization scheme can be widely used in general parallel architecture in which many GF multipliers are involved.

A Total Dose Radiation Hardened PDSOI CMOS 3-Line to 8-Line Decoder

The first domestic total dose hardened 2μm partially depleted silicon-on-insulator （PDSOI） CMOS 3-line to 8- line decoder fabricated in SIMOX is demonstrated. The radiation performance is characterized by transistor threshold voltage shifts,circuit static leakage currents,and I-V curves as a function of total dose up to 3× 10^5rad（Si）. The worst case threshold voltage shifts of the front channels are less than 20mV for nMOS transistors at 3 × 10^5rad（Si） and follow-up irradiation and less than 70mV for the pMOS transistors. Furthermore, no significant radiation induced leakage currents and functional degeneration are observed.

Low complexity suboptimal decode algorithms for quasi- orthogonal space time block codes

Due to the high complexity of the pairwise decoding algorithm and the poor performance of zero forcing（ ZF） /minimum mean square error（ MMSE） decoding algorithm, two low-complexity suboptimal decoding algorithms, called pairwisequasi-ZF and pairwise-quasi-MMSE decoders, are proposed. First,two transmit signals are detected by the quasi-ZF or the quasiMMSE algorithm at the receiver. Then, the two detected signals as the decoding results are substituted into the two pairwise decoding algorithm expressions to detect the other two transmit signals. The bit error rate（ BER） performance of the proposed algorithms is compared with that of the current known decoding algorithms.Also, the number of calculations of ZF, MMSE, quasi-ZF and quasi-MMSE algorithms is compared with each other. Simulation results showthat the BER performance of the proposed algorithms is substantially improved in comparison to the quasi-ZF and quasiMMSE algorithms. The BER performance of the pairwise-quasiZF（ pairwise-quasi-MMSE） decoder is equivalent to the pairwiseZF（ pairwise-MMSE） decoder, while the computational complexity is significantly reduced.

Modified Benes network architecture for WiMAX LDPC decoder

A modified Benes network is proposed to be used as an optimal shuffle network in worldwide interoperability for microwave access （WiMAX） low density parity check （LDPC） decoders, When the size of the input is not a power of two, the modified Benes network can achieve the most optimal performance. This modified Benes network is non-blocking and can perform any sorts of permutations, so it can support 19 modes specified in the WiMAX system. Furthermore, an efficient algorithm to generate the control signals for all the 2 × 2 switches in this network is derived, which can reduce the hardware complexity and overall latency of the modified Benes network. Synthesis results show that the proposed control signal generator can save 25.4% chip area and the overall network latency can be reduced by 36. 2%.

Partial Iterative Decode of Turbo Codes for On-Board Processing Satellite Platform

There is a contradiction between high processing complexity and limited processing resources when turbo codes are used on the on-board processing(OBP)satellite platform.To solve this problem,this paper proposes a partial iterative decode method for on-board application,in which satellite only carries out limited number of iteration according to the on-board processing resource limitation and the throughput capacity requirements.In this method,the soft information of parity bits,which is not obtained individually in conventional turbo decoder,is encoded and forwarded along with those of information bits.To save downlink transmit power,the soft information is limited and normalized before forwarding.The iteration number and limiter parameters are optimized with the help of EXIT chart and numerical analysis,respectively.Simulation results show that the proposed method can effectively decrease the complexity of onboard processing while achieve most of the decoding gain..

Viterbi Decoder ACS单元中路径度量值存储空间的优化

ACS单元的设计及路径度量(PM)值的存储是Viterbi Decoder硬件实现的重要部分之一。介绍了一种码率为1/2的硬判决Viterbi Decoder的ACS部分的硬件实现方法。采用了一种全新的设计与存储方式,即原位运算旋转地址的方式,极大地节省了在ACS运算过程中用以存储路径度量值的RAM空间,大量的实验证明,设计的译码器在资源消耗上有较大优势。

High Performance Viterbi Decoder on Cell/B.E.

Viterbi decoding is widely used in many radio systems. Because of the large computation complexity, it is usually implemented with ASIC chips, FPGA chips, or optimized hardware accelerators. With the rapid development of the multicore technology, multicore platforms become a reasonable choice for software radio (SR) systems. The Cell Broadband Engine processor is a state-of-art multi-core processor designed by Sony, Toshiba, and IBM. In this paper, we present a 64-state soft input Viterbi decoder for WiMAX SR Baseband system based on the Cell processor. With one Synergistic Processor Element (SPE) of a Cell Processor running at 3.2GHz, our Viterbi decoder can achieve the throughput up to 30Mb/s to decode the tail-biting convolutional code. The performance demonstrates that the proposed Viterbi decoding implementation is very efficient. Moreover, the Viterbi decoder can be easily integrated to the SR system and can provide a highly integrated SR solution. The optimization methodology in this module design can be extended to other modules on Cell platform.