One of the elementary operations in computing systems is multiplication.Therefore,high-speed and low-power multipliers design is mandatory for efficient computing systems.In designing low-energy dissipation circuits,r...One of the elementary operations in computing systems is multiplication.Therefore,high-speed and low-power multipliers design is mandatory for efficient computing systems.In designing low-energy dissipation circuits,reversible logic is more efficient than irreversible logic circuits but at the cost of higher complexity.This paper introduces an efficient signed/unsigned 4×4 reversible Vedic multiplier with minimum quantum cost.The Vedic multiplier is considered fast as it generates all partial product and their sum in one step.This paper proposes two reversible Vedic multipliers with optimized quantum cost and garbage output.First,the unsigned Vedic multiplier is designed based on the Urdhava Tiryakbhyam(UT)Sutra.This multiplier consists of bitwise multiplication and adder compressors.Compared with Vedic multipliers in the literature,the proposed design has a quantum cost of 111 with a reduction of 94%compared to the previous design.It has a garbage output of 30 with optimization of the best-compared design.Second,the proposed unsigned multiplier is expanded to allow the multiplication of signed numbers as well as unsigned numbers.Two signed Vedic multipliers are presented with the aim of obtaining more optimization in performance parameters.DesignI has separate binary two’s complement(B2C)and MUX circuits,while DesignII combines binary two’s complement and MUX circuits in one circuit.DesignI shows the lowest quantum cost,231,regarding state-ofthe-art.DesignII has a quantum cost of 199,reducing to 86.14%of DesignI.The functionality of the proposed multiplier is simulated and verified using XILINX ISE 14.2.展开更多
Approximate computing is a popularfield for low power consumption that is used in several applications like image processing,video processing,multi-media and data mining.This Approximate computing is majorly performed ...Approximate computing is a popularfield for low power consumption that is used in several applications like image processing,video processing,multi-media and data mining.This Approximate computing is majorly performed with an arithmetic circuit particular with a multiplier.The multiplier is the most essen-tial element used for approximate computing where the power consumption is majorly based on its performance.There are several researchers are worked on the approximate multiplier for power reduction for a few decades,but the design of low power approximate multiplier is not so easy.This seems a bigger challenge for digital industries to design an approximate multiplier with low power and minimum error rate with higher accuracy.To overcome these issues,the digital circuits are applied to the Deep Learning(DL)approaches for higher accuracy.In recent times,DL is the method that is used for higher learning and prediction accuracy in severalfields.Therefore,the Long Short-Term Memory(LSTM)is a popular time series DL method is used in this work for approximate computing.To provide an optimal solution,the LSTM is combined with a meta-heuristics Jel-lyfish search optimisation technique to design an input aware deep learning-based approximate multiplier(DLAM).In this work,the jelly optimised LSTM model is used to enhance the error metrics performance of the Approximate multiplier.The optimal hyperparameters of the LSTM model are identified by jelly search opti-misation.Thisfine-tuning is used to obtain an optimal solution to perform an LSTM with higher accuracy.The proposed pre-trained LSTM model is used to generate approximate design libraries for the different truncation levels as a func-tion of area,delay,power and error metrics.The experimental results on an 8-bit multiplier with an image processing application shows that the proposed approx-imate computing multiplier achieved a superior area and power reduction with very good results on error rates.展开更多
With the continuous development of deep learning,Deep Convolutional Neural Network(DCNN)has attracted wide attention in the industry due to its high accuracy in image classification.Compared with other DCNN hard-ware ...With the continuous development of deep learning,Deep Convolutional Neural Network(DCNN)has attracted wide attention in the industry due to its high accuracy in image classification.Compared with other DCNN hard-ware deployment platforms,Field Programmable Gate Array(FPGA)has the advantages of being programmable,low power consumption,parallelism,and low cost.However,the enormous amount of calculation of DCNN and the limited logic capacity of FPGA restrict the energy efficiency of the DCNN accelerator.The traditional sequential sliding window method can improve the throughput of the DCNN accelerator by data multiplexing,but this method’s data multiplexing rate is low because it repeatedly reads the data between rows.This paper proposes a fast data readout strategy via the circular sliding window data reading method,it can improve the multiplexing rate of data between rows by optimizing the memory access order of input data.In addition,the multiplication bit width of the DCNN accelerator is much smaller than that of the Digital Signal Processing(DSP)on the FPGA,which means that there will be a waste of resources if a multiplication uses a single DSP.A multiplier sharing strategy is proposed,the multiplier of the accelerator is customized so that a single DSP block can complete multiple groups of 4,6,and 8-bit signed multiplication in parallel.Finally,based on two strategies of appeal,an FPGA optimized accelerator is proposed.The accelerator is customized by Verilog language and deployed on Xilinx VCU118.When the accelerator recognizes the CIRFAR-10 dataset,its energy efficiency is 39.98 GOPS/W,which provides 1.73×speedup energy efficiency over previous DCNN FPGA accelerators.When the accelerator recognizes the IMAGENET dataset,its energy efficiency is 41.12 GOPS/W,which shows 1.28×−3.14×energy efficiency compared with others.展开更多
In this article, we have given the definition of the relative double multiplier (quasi-multiplier) on a ternary algebra,and studied the isomorphic problem of the multiplier algebra M(A,e) of a ternary algerbra A.
A novel algorithm, i.e. the fast alternating direction method of multipliers (ADMM), is applied to solve the classical total-variation ( TV )-based model for image reconstruction. First, the TV-based model is refo...A novel algorithm, i.e. the fast alternating direction method of multipliers (ADMM), is applied to solve the classical total-variation ( TV )-based model for image reconstruction. First, the TV-based model is reformulated as a linear equality constrained problem where the objective function is separable. Then, by introducing the augmented Lagrangian function, the two variables are alternatively minimized by the Gauss-Seidel idea. Finally, the dual variable is updated. Because the approach makes full use of the special structure of the problem and decomposes the original problem into several low-dimensional sub-problems, the per iteration computational complexity of the approach is dominated by two fast Fourier transforms. Elementary experimental results indicate that the proposed approach is more stable and efficient compared with some state-of-the-art algorithms.展开更多
This paper presents a new kind of macromodel of OTA,which can be used to solve the problem in which the two port macromodel couldnt reflect some functions of the OTA.The new model also opens up a new way for the simu...This paper presents a new kind of macromodel of OTA,which can be used to solve the problem in which the two port macromodel couldnt reflect some functions of the OTA.The new model also opens up a new way for the simulation of the OTA circuit.This paper discusses the way of designing this model and simulating it in SPICE.The result proves its reasonable design and its simplicity in structure.In the application of this model,we design a complete symmetric double differential quarter square OTA multiplying unit by using four three port OTA macromodels.It successfully solved the problem of the unsymmetry of two input ports in an OTA multiplying unit.This result fully agrees with the experiment.展开更多
Let G be a group and (A, B) be a pair of multiplier Hopf algebras, where B is regular G-cograded. Let π be a crossing action of G on B, D^π=A^cop∝B=+p∈GDπ^p with Dπ^p=A^cop∝Bp, is the Drinfeld double of the ...Let G be a group and (A, B) be a pair of multiplier Hopf algebras, where B is regular G-cograded. Let π be a crossing action of G on B, D^π=A^cop∝B=+p∈GDπ^p with Dπ^p=A^cop∝Bp, is the Drinfeld double of the pair (A, B), and then the deformation D^π becomes a multiplier Hopf algebra. B×A can be considered as a subalgebra of M(D^π×D^π), the image of element b×a in B×A is (1∝b)×(a∝1) in M(D^π×D^π). Let W =∑αWα∈ M(B×A) be a π-canonical multiplier for the pair (A, B) with Wα∈M(Bα×A) for all α∈G. The image of W in M(D^π×D^π)is a π-quasitriangular structure over D^π.展开更多
Testing of a triple gas electron multiplier (GEM) with pixel-pads is described. Images by scanning and suspending radioactive sources were obtained by using 96 channels digital data acquisition (DAQ) system which ...Testing of a triple gas electron multiplier (GEM) with pixel-pads is described. Images by scanning and suspending radioactive sources were obtained by using 96 channels digital data acquisition (DAQ) system which was composed of 96 8×8 mm2 pads and associated electronics channels.展开更多
In this article we introduce the paranormed sequence spaces (f,A, Am,p), c0(f,A,Am,p) and L00(f,A, Am,p), associated with the multiplier sequence ∧ = (hk), defined by a modulus function f. We study their diff...In this article we introduce the paranormed sequence spaces (f,A, Am,p), c0(f,A,Am,p) and L00(f,A, Am,p), associated with the multiplier sequence ∧ = (hk), defined by a modulus function f. We study their different properties like solidness, symmetricity, completeness etc. and prove some inclusion results.展开更多
Reduction of conservatism is one of the key and difficult problems in missile robust gain scheduling autopilot design based on multipliers.This article presents a scheme of adopting linear parameter-varying(LPV) con...Reduction of conservatism is one of the key and difficult problems in missile robust gain scheduling autopilot design based on multipliers.This article presents a scheme of adopting linear parameter-varying(LPV) control approach with full block multipliers to design a missile robust gain scheduling autopilot in order to eliminate conservatism.A model matching design structure with a high demand on matching precision is constructed based on the missile linear fractional transformation(LFT) model.By applying full block S-procedure and elimination lemma,a convex feasibility problem with an infinite number of constraints is formulated to satisfy robust quadratic performance specifications.Then a grid method is adopted to transform the infinite-dimensional convex feasibility problem into a solvable finite-dimensional convex feasibility problem,based on which a gain scheduling controller with linear fractional dependence on the flight Mach number and altitude is derived.Static and dynamic simulation results show the effectiveness and feasibility of the proposed scheme.展开更多
In this paper, we establish two multiplier theorems for Herz type Hardy spaces, and as an application, we discuss the boundedness of pseudo-differential operators in these spaces.
This paper is devoted to characterizing the Riemann-Stieltjes operators and pointwise multipliers on F(p, q, s) spaces in the unit ball of C^n which contain many classical function spaces, such as the Bloch space, B...This paper is devoted to characterizing the Riemann-Stieltjes operators and pointwise multipliers on F(p, q, s) spaces in the unit ball of C^n which contain many classical function spaces, such as the Bloch space, BMOA and Q8 spaces. The boundedness and compactness of these operators on F(p, q, s) spaces are characterized by means of an embedding theorem, i.e., F(p,q, s) spaces boundedly embedded into the tent-type spaces Tp,s^∞(μ)展开更多
Let G be a locally compact unimodular group with Haar measure rmdx and ω be the Beurling's weight function on G (Reiter, [10]). In this paper the authors define a space Aωp,q (G) and prove that Aωp,q (G) is a t...Let G be a locally compact unimodular group with Haar measure rmdx and ω be the Beurling's weight function on G (Reiter, [10]). In this paper the authors define a space Aωp,q (G) and prove that Aωp,q (G) is a translation invariant Banach space. Fur- thermore the authors discuss inclusion properties and show that if G is a locally compact abelian group then Aωp,q (G) admits an approximate identity bounded in Lω1 (G). It is also proved that the space Lωp (G) Lω1 Lωq (G) is isometrically isomorphic to the space Aωp,q (G) and the space of multipliers from Lωp (G) to Lq-1, (G) is isometrically isomorphic to the dual of the space Aωp,q (G) iff G satisfies a property Ppq. At the end of this work it is showed that if G is a locally compact abelian group then the space of all multipliers from Lω1 (G) to Aωp,q (G) is the space Aωp,q (G).展开更多
Let A be a symmetric expansive matrix and H^p(R^n) be the anisotropic Hardy space associated with A. For a function m in L∞(R^n), an appropriately chosen function η in Cc^∞(R^n) and j ∈ Z define mj(ξ) = m...Let A be a symmetric expansive matrix and H^p(R^n) be the anisotropic Hardy space associated with A. For a function m in L∞(R^n), an appropriately chosen function η in Cc^∞(R^n) and j ∈ Z define mj(ξ) = m(A^jξ)η(ξ). The authors show that if 0 〈 p 〈 1 and mj belongs to the anisotropic nonhomogeneous Herz space K1^1/P^-1,p(R^n), then m is a Fourier multiplier from H^p(R^n) to L^V(R^n). For p = 1, a similar result is obtained if the space K1^0.1(R^n) is replaced by a slightly smaller space K(w). Moreover, the authors show that if 0 〈 p 〈 1 and if the sequence {(mj)^v} belongs to a certain mixednorm space, depending on p, then m is also a Fourier multiplier from H^p(R^n) to L^v(R^n).展开更多
Let G be a locally compact Abelian group with Haar measure μ. In the present paper, first the authors discussed some properties of weighted Lorentz space. Then they defined the relative completion A of a subspace A o...Let G be a locally compact Abelian group with Haar measure μ. In the present paper, first the authors discussed some properties of weighted Lorentz space. Then they defined the relative completion A of a subspace A of the weighted Lorentz space, and showed that the space of the multipliers from L_w~1,(G) to A is algebrically isomorphic and homeomorphic to A.展开更多
Let G be a locally compact abelian group. The main purpose of this article is to find the space of multipliers from the Lorentz space. L(p1, q1)(G) to L(p'2, q'2)(G). For this reason, the authors define the ...Let G be a locally compact abelian group. The main purpose of this article is to find the space of multipliers from the Lorentz space. L(p1, q1)(G) to L(p'2, q'2)(G). For this reason, the authors define the space A p1,q1^ p2,p2(G), discuss its properties and prove that the space of multipliers from L(p1, q1)(G) to L(p'2, q'2)(G) is isometrically isomorphic to the dual of A p1,q1^p2,q2 (G).展开更多
In this article, we characterize the boundedness and compactness of extended Cesaro operators on the spaces BMOA by the Carleson measures in the unit ball. Mea while, we study the pointwise multipliers on BMOA.
文摘One of the elementary operations in computing systems is multiplication.Therefore,high-speed and low-power multipliers design is mandatory for efficient computing systems.In designing low-energy dissipation circuits,reversible logic is more efficient than irreversible logic circuits but at the cost of higher complexity.This paper introduces an efficient signed/unsigned 4×4 reversible Vedic multiplier with minimum quantum cost.The Vedic multiplier is considered fast as it generates all partial product and their sum in one step.This paper proposes two reversible Vedic multipliers with optimized quantum cost and garbage output.First,the unsigned Vedic multiplier is designed based on the Urdhava Tiryakbhyam(UT)Sutra.This multiplier consists of bitwise multiplication and adder compressors.Compared with Vedic multipliers in the literature,the proposed design has a quantum cost of 111 with a reduction of 94%compared to the previous design.It has a garbage output of 30 with optimization of the best-compared design.Second,the proposed unsigned multiplier is expanded to allow the multiplication of signed numbers as well as unsigned numbers.Two signed Vedic multipliers are presented with the aim of obtaining more optimization in performance parameters.DesignI has separate binary two’s complement(B2C)and MUX circuits,while DesignII combines binary two’s complement and MUX circuits in one circuit.DesignI shows the lowest quantum cost,231,regarding state-ofthe-art.DesignII has a quantum cost of 199,reducing to 86.14%of DesignI.The functionality of the proposed multiplier is simulated and verified using XILINX ISE 14.2.
文摘Approximate computing is a popularfield for low power consumption that is used in several applications like image processing,video processing,multi-media and data mining.This Approximate computing is majorly performed with an arithmetic circuit particular with a multiplier.The multiplier is the most essen-tial element used for approximate computing where the power consumption is majorly based on its performance.There are several researchers are worked on the approximate multiplier for power reduction for a few decades,but the design of low power approximate multiplier is not so easy.This seems a bigger challenge for digital industries to design an approximate multiplier with low power and minimum error rate with higher accuracy.To overcome these issues,the digital circuits are applied to the Deep Learning(DL)approaches for higher accuracy.In recent times,DL is the method that is used for higher learning and prediction accuracy in severalfields.Therefore,the Long Short-Term Memory(LSTM)is a popular time series DL method is used in this work for approximate computing.To provide an optimal solution,the LSTM is combined with a meta-heuristics Jel-lyfish search optimisation technique to design an input aware deep learning-based approximate multiplier(DLAM).In this work,the jelly optimised LSTM model is used to enhance the error metrics performance of the Approximate multiplier.The optimal hyperparameters of the LSTM model are identified by jelly search opti-misation.Thisfine-tuning is used to obtain an optimal solution to perform an LSTM with higher accuracy.The proposed pre-trained LSTM model is used to generate approximate design libraries for the different truncation levels as a func-tion of area,delay,power and error metrics.The experimental results on an 8-bit multiplier with an image processing application shows that the proposed approx-imate computing multiplier achieved a superior area and power reduction with very good results on error rates.
基金supported in part by the Major Program of the Ministry of Science and Technology of China under Grant 2019YFB2205102in part by the National Natural Science Foundation of China under Grant 61974164,62074166,61804181,62004219,62004220,62104256.
文摘With the continuous development of deep learning,Deep Convolutional Neural Network(DCNN)has attracted wide attention in the industry due to its high accuracy in image classification.Compared with other DCNN hard-ware deployment platforms,Field Programmable Gate Array(FPGA)has the advantages of being programmable,low power consumption,parallelism,and low cost.However,the enormous amount of calculation of DCNN and the limited logic capacity of FPGA restrict the energy efficiency of the DCNN accelerator.The traditional sequential sliding window method can improve the throughput of the DCNN accelerator by data multiplexing,but this method’s data multiplexing rate is low because it repeatedly reads the data between rows.This paper proposes a fast data readout strategy via the circular sliding window data reading method,it can improve the multiplexing rate of data between rows by optimizing the memory access order of input data.In addition,the multiplication bit width of the DCNN accelerator is much smaller than that of the Digital Signal Processing(DSP)on the FPGA,which means that there will be a waste of resources if a multiplication uses a single DSP.A multiplier sharing strategy is proposed,the multiplier of the accelerator is customized so that a single DSP block can complete multiple groups of 4,6,and 8-bit signed multiplication in parallel.Finally,based on two strategies of appeal,an FPGA optimized accelerator is proposed.The accelerator is customized by Verilog language and deployed on Xilinx VCU118.When the accelerator recognizes the CIRFAR-10 dataset,its energy efficiency is 39.98 GOPS/W,which provides 1.73×speedup energy efficiency over previous DCNN FPGA accelerators.When the accelerator recognizes the IMAGENET dataset,its energy efficiency is 41.12 GOPS/W,which shows 1.28×−3.14×energy efficiency compared with others.
文摘In this article, we have given the definition of the relative double multiplier (quasi-multiplier) on a ternary algebra,and studied the isomorphic problem of the multiplier algebra M(A,e) of a ternary algerbra A.
基金The Scientific Research Foundation of Nanjing University of Posts and Telecommunications(No.NY210049)
文摘A novel algorithm, i.e. the fast alternating direction method of multipliers (ADMM), is applied to solve the classical total-variation ( TV )-based model for image reconstruction. First, the TV-based model is reformulated as a linear equality constrained problem where the objective function is separable. Then, by introducing the augmented Lagrangian function, the two variables are alternatively minimized by the Gauss-Seidel idea. Finally, the dual variable is updated. Because the approach makes full use of the special structure of the problem and decomposes the original problem into several low-dimensional sub-problems, the per iteration computational complexity of the approach is dominated by two fast Fourier transforms. Elementary experimental results indicate that the proposed approach is more stable and efficient compared with some state-of-the-art algorithms.
文摘This paper presents a new kind of macromodel of OTA,which can be used to solve the problem in which the two port macromodel couldnt reflect some functions of the OTA.The new model also opens up a new way for the simulation of the OTA circuit.This paper discusses the way of designing this model and simulating it in SPICE.The result proves its reasonable design and its simplicity in structure.In the application of this model,we design a complete symmetric double differential quarter square OTA multiplying unit by using four three port OTA macromodels.It successfully solved the problem of the unsymmetry of two input ports in an OTA multiplying unit.This result fully agrees with the experiment.
基金Specialized Research Fund for the Doctoral Program of Higher Education(No20060286006)the National Natural Science Foundation of China(No10871042)
文摘Let G be a group and (A, B) be a pair of multiplier Hopf algebras, where B is regular G-cograded. Let π be a crossing action of G on B, D^π=A^cop∝B=+p∈GDπ^p with Dπ^p=A^cop∝Bp, is the Drinfeld double of the pair (A, B), and then the deformation D^π becomes a multiplier Hopf algebra. B×A can be considered as a subalgebra of M(D^π×D^π), the image of element b×a in B×A is (1∝b)×(a∝1) in M(D^π×D^π). Let W =∑αWα∈ M(B×A) be a π-canonical multiplier for the pair (A, B) with Wα∈M(Bα×A) for all α∈G. The image of W in M(D^π×D^π)is a π-quasitriangular structure over D^π.
文摘Testing of a triple gas electron multiplier (GEM) with pixel-pads is described. Images by scanning and suspending radioactive sources were obtained by using 96 channels digital data acquisition (DAQ) system which was composed of 96 8×8 mm2 pads and associated electronics channels.
文摘In this article we introduce the paranormed sequence spaces (f,A, Am,p), c0(f,A,Am,p) and L00(f,A, Am,p), associated with the multiplier sequence ∧ = (hk), defined by a modulus function f. We study their different properties like solidness, symmetricity, completeness etc. and prove some inclusion results.
文摘Reduction of conservatism is one of the key and difficult problems in missile robust gain scheduling autopilot design based on multipliers.This article presents a scheme of adopting linear parameter-varying(LPV) control approach with full block multipliers to design a missile robust gain scheduling autopilot in order to eliminate conservatism.A model matching design structure with a high demand on matching precision is constructed based on the missile linear fractional transformation(LFT) model.By applying full block S-procedure and elimination lemma,a convex feasibility problem with an infinite number of constraints is formulated to satisfy robust quadratic performance specifications.Then a grid method is adopted to transform the infinite-dimensional convex feasibility problem into a solvable finite-dimensional convex feasibility problem,based on which a gain scheduling controller with linear fractional dependence on the flight Mach number and altitude is derived.Static and dynamic simulation results show the effectiveness and feasibility of the proposed scheme.
文摘In this paper, we establish two multiplier theorems for Herz type Hardy spaces, and as an application, we discuss the boundedness of pseudo-differential operators in these spaces.
基金Supported in part by the National Natural Science Foundation of China(11271359)the Fundamental Research Funds for the Central Universities(2014-Ia-037and 2015-IVA-069)
文摘This paper is devoted to characterizing the Riemann-Stieltjes operators and pointwise multipliers on F(p, q, s) spaces in the unit ball of C^n which contain many classical function spaces, such as the Bloch space, BMOA and Q8 spaces. The boundedness and compactness of these operators on F(p, q, s) spaces are characterized by means of an embedding theorem, i.e., F(p,q, s) spaces boundedly embedded into the tent-type spaces Tp,s^∞(μ)
文摘Let G be a locally compact unimodular group with Haar measure rmdx and ω be the Beurling's weight function on G (Reiter, [10]). In this paper the authors define a space Aωp,q (G) and prove that Aωp,q (G) is a translation invariant Banach space. Fur- thermore the authors discuss inclusion properties and show that if G is a locally compact abelian group then Aωp,q (G) admits an approximate identity bounded in Lω1 (G). It is also proved that the space Lωp (G) Lω1 Lωq (G) is isometrically isomorphic to the space Aωp,q (G) and the space of multipliers from Lωp (G) to Lq-1, (G) is isometrically isomorphic to the dual of the space Aωp,q (G) iff G satisfies a property Ppq. At the end of this work it is showed that if G is a locally compact abelian group then the space of all multipliers from Lω1 (G) to Aωp,q (G) is the space Aωp,q (G).
基金Supported by NSP of China (Grant No. 10571015)RFDP of China (Grant No. 20050027025).
文摘Let A be a symmetric expansive matrix and H^p(R^n) be the anisotropic Hardy space associated with A. For a function m in L∞(R^n), an appropriately chosen function η in Cc^∞(R^n) and j ∈ Z define mj(ξ) = m(A^jξ)η(ξ). The authors show that if 0 〈 p 〈 1 and mj belongs to the anisotropic nonhomogeneous Herz space K1^1/P^-1,p(R^n), then m is a Fourier multiplier from H^p(R^n) to L^V(R^n). For p = 1, a similar result is obtained if the space K1^0.1(R^n) is replaced by a slightly smaller space K(w). Moreover, the authors show that if 0 〈 p 〈 1 and if the sequence {(mj)^v} belongs to a certain mixednorm space, depending on p, then m is also a Fourier multiplier from H^p(R^n) to L^v(R^n).
文摘Let G be a locally compact Abelian group with Haar measure μ. In the present paper, first the authors discussed some properties of weighted Lorentz space. Then they defined the relative completion A of a subspace A of the weighted Lorentz space, and showed that the space of the multipliers from L_w~1,(G) to A is algebrically isomorphic and homeomorphic to A.
文摘Let G be a locally compact abelian group. The main purpose of this article is to find the space of multipliers from the Lorentz space. L(p1, q1)(G) to L(p'2, q'2)(G). For this reason, the authors define the space A p1,q1^ p2,p2(G), discuss its properties and prove that the space of multipliers from L(p1, q1)(G) to L(p'2, q'2)(G) is isometrically isomorphic to the dual of A p1,q1^p2,q2 (G).
基金supported by the National Natural Science Foundation of China(10771064,11101139)Natural Science Foundation of Zhejiang province (Y7080197,Y6090036,Y6100219)Foundation of Creative Group in Universities of Zhejiang Province (T200924)
文摘In this article, we characterize the boundedness and compactness of extended Cesaro operators on the spaces BMOA by the Carleson measures in the unit ball. Mea while, we study the pointwise multipliers on BMOA.