Characterization of FEEWAVE,a low‑power waveform digitizer ASIC with 15‑ps time resolution

Purpose FEEWAVE is a chip with a waveform digitizer based on a switched capacitor array(SCA).A SCA uses capacitor arrays to store waveforms and exhibits low-power consumption and high time resolution performance.However,the limitations of the chip manufacturing process induce sampling interval and digitization deviations between different cells,which affects the performance of the chip.Methods Calibration was performed on the SCA sampling part on the FEEWAVE chip to obtain more accurate digitized output and time intervals between the sampling cells.Experiments were carried out according to the proposed amplitude and time calibration methods,and the time resolution of the chip was further improved by a fitting algorithm.Results and conclusion Through the calibration algorithm,the time resolution of the SCA sampling part of the chip reached 9.0 ps after calibration.In the self-test of the electronics time performance,the time measurement after leading-edge fitting and calibration was approximately 12.3 ps.In the joint test with silicon photomultiplier detectors,the time resolution of the SCA part was low and comparable to the resolution of the oscilloscope after calibration algorithm and waveform fitting.

Application of the DRS4 chip for GHz waveform digitizing circuits

A new fast waveform sampling digitizing circuit based on the domino ring sampler （DRS）, a switched capacitor array （SCA） chip, is presented in this paper, which is different from the traditional waveform digitizing circuit constructed with an analog to digital converter （ADC） or time to digital converter. A DRS4 chip is used as a core device in our circuit, which has a fast sampling rate up to five gigabit samples per second （GSPS）. Quite satisfactory results are acquired by the preliminary performance test for this circuit board. Eight channels can be provided by one board, which has a 1 V input dynamic range for each channel. The circuit linearity is better than 0.1%, the noise is less than 0.5 mV （root mean square, RMS）, and its time resolution is about 50 ps. Several boards can be cascaded to construct a multi-board system. The advantages of high resolution, low cost, low power dissipation, high channel density and small size make the circuit board useful not only for physics experiments, but also for other applications.

A new positron annihilation lifetime spectrometer based on DRS4 waveform digitizing board

A new simple digital positron lifetime spectrometer has been developed. It includes a DRS4 waveform digitizing board and two scintillation detectors based on the XP2020Q photomultiplier tubes and LaBr3 scintillators. The DRS4 waveform digitizing can handle small pulses, down to few tens of millivolts, and its time scale linearity and stability are very good. The new system has reached a 206 ps time resolution, which is better than the conventional analog apparatus using the same detectors. These improvements make this spectrometer more simple and convenient in comparison with other spectrometers, and it can be applied to the other scintillation timing measurements with picosecond accuracy.

Method for improving the time resolution of a TOF system

In order to study the possibility of improving the timing performance of the time of flight （TOF） systems, which are made of plastic scintillator counters, and read out by photomultiplier tubes （PMT） with mesh dynodes and conventional electronics, we have conducted a study using faster PMTs and ultra fast waveform digitizers to read out the plastic scintillators. Different waveform analysis methods are used to calculate the time resolution of such a system. Results are compared with the conventional discriminating method based on a threshold and pulse height. Our tests and analysis show that significant timing performance improvements can be achieved by using this new system.

A high time resolution and low-power ASIC for MRPC applications

Purpose The structure of readout circuits needs to be improved to meet the requirements of the endcap time of flight upgrade with multi-gap resistive plate chamber(MRPC)in Beijing SpectrometerⅢexperiments,posing a demand for the high time resolution and low-power electronics.Methods Considering MRPC features,an application-specific integrated circuit(ASIC)called FEEWAVE,which integrates the front-end circuit and digitization function,is proposed to meet the above requirements.The front-end circuit implements I/V conversion and signal amplification.To reduce power consumption and further improve the time resolution,the waveform sampling technique based on switch capacitor array is adopted.Results and conclusion A 30 fC to 1.2 pC input signal dynamic range is obtained,and the jitter is less than 21 ps rms.At the same time,the chip realizes 5 GSPS(gigabit samples per second)sampling rate,trigger rate capability of 50 kHz and 25 mW/channel power consumption.The 6-channel ASIC has been designed and taped out with 0.18μm complementary metal oxide semiconductor technology.The preliminary test results of FEEWAVE have been achieved.