Cerium dioxide, CeO2, is a potentially superior material in a myriad of areas, and many methods have been proposed to deposit single crystal CeO2 thin films. A novel fabrication technique utilizing dual plasma generat...Cerium dioxide, CeO2, is a potentially superior material in a myriad of areas, and many methods have been proposed to deposit single crystal CeO2 thin films. A novel fabrication technique utilizing dual plasma generated by metal vacuum arc (MEVVA) and radio frequency (RF) is discussed in this paper. We have recently conducted a systematic investigation to determine the optimal process window to deposit CeO2 thin films'on Si(100) substrates. The X-ray diffraction results show the existence of CeO2(100) in the as-deposited sample.展开更多
在铁电场效应晶体管(Ferroelectric Field Effect Transistor,FeFET)中,Hf_(0.5)Zr_(0.5)O_(2)(HZO)铁电薄膜的厚度是影响晶体管性能的关键参数。通过制备不同厚度铁电薄膜的铁电电容对其进行测试,选择最优厚度的铁电薄膜,设计制备一种1...在铁电场效应晶体管(Ferroelectric Field Effect Transistor,FeFET)中,Hf_(0.5)Zr_(0.5)O_(2)(HZO)铁电薄膜的厚度是影响晶体管性能的关键参数。通过制备不同厚度铁电薄膜的铁电电容对其进行测试,选择最优厚度的铁电薄膜,设计制备一种15 nm Hf_(0.5)Zr_(0.5)O_(2)铁电薄膜的铁电晶体管——Si/HZO/W(MFS)栅极结构的铁电晶体管。它的剩余极化强度2Pr达到30μC·cm^(-2),具有高的循环稳定性和倍率性能,电压窗口达到1.2 V,在铁电存储器领域具有巨大的应用潜力。展开更多
Metal-ferroelectric-insulator-silicon(MFIS) capacitors with Bi3.15Nd0.85Ti3O12(BNT) ferroelectric thin film were simulated using a commercial software Silvaco/Atlas,and the effects of applied voltage and insulator lay...Metal-ferroelectric-insulator-silicon(MFIS) capacitors with Bi3.15Nd0.85Ti3O12(BNT) ferroelectric thin film were simulated using a commercial software Silvaco/Atlas,and the effects of applied voltage and insulator layer on capacitance-voltage(C-V) hysteresis loops and memory windows were investigated. For the MFIS capacitors with CeO2 insulator,with the increase of applied voltage from 2 V to 15 V,the C-V loops become wider and memory windows increase from 0.15 V to 1.27 V. When the thickness of CeO2 layer increases from 1 nm to 5 nm at the applied voltage of 5 V,the C-V loops become narrower and the memory windows decrease from 1.09 V to 0.36 V. For MFIS capacitors with different insulator layers(CeO2,HfO2,Y2O3,Si3N4 and SiO2),the high dielectric constants can make the C-V loops wider and improve the capacitor's memory window. The simulation results prove that Silvaco/Atlas is a powerful simulator for MFIS capacitor,and they are helpful to the fabrication of MFIS nonvolatile memory devices.展开更多
Comparing with hot researches in absorber layer,window layer has attracted less attention in PbS quantum dot solar cells(QD SCs). Actually, the window layer plays a key role in exciton separation, charge drifting, and...Comparing with hot researches in absorber layer,window layer has attracted less attention in PbS quantum dot solar cells(QD SCs). Actually, the window layer plays a key role in exciton separation, charge drifting, and so on.Herein, ZnO window layer was systematically investigated for its roles in QD SCs performance. The physical mechanism of improved performance was also explored. It was found that the optimized ZnO films with appropriate thickness and doping concentration can balance the optical and electrical properties, and its energy band align well with the absorber layer for efficient charge extraction. Further characterizations demonstrated that the window layer optimization can help to reduce the surface defects, improve the heterojunction quality, as well as extend the depletion width. Compared with the control devices, the optimized devices have obtained an efficiency of 6.7% with an enhanced V_(oc) of 18%, J_(sc) of 21%, FF of 10%, and power conversion efficiency of 58%. The present work suggests a useful strategy to improve the device performance by optimizing the window layer besides the absorber layer.展开更多
利用新型铁电材料Na 0.5 Y 0.5 TiO 3(NYTO)薄膜高介电的特点,将其作为MFIS(metal-ferroelectric-insulator-semiconductor,MFIS)电容器的绝缘层,制备出Pt/Pb(Zr 0.2 Ti 0.8)O 3/NYTO/Si结构电容器,并对其进行XRD、SEM、C-V特性测试及I-...利用新型铁电材料Na 0.5 Y 0.5 TiO 3(NYTO)薄膜高介电的特点,将其作为MFIS(metal-ferroelectric-insulator-semiconductor,MFIS)电容器的绝缘层,制备出Pt/Pb(Zr 0.2 Ti 0.8)O 3/NYTO/Si结构电容器,并对其进行XRD、SEM、C-V特性测试及I-V特性测试分析.分别对C-V存储窗口(记忆窗口,memory window)与应用电压以及绝缘层膜厚的关系进行了研究,结果表明记忆窗口数值比较理想.绝缘层厚度为40 nm、电容器的应用电压为32 V时,记忆窗口可达13 V.对制备的MFIS电容器I-V特性进行了研究,结果表明器件具备较低的漏电流密度,为1.08×10-6 A/cm 2,且其电流传导机制符合空间电荷限制电流导电机制.展开更多
基金The work was supported by Hong Kong RGC CERG9040344 and 9040412, RGC / Germany Joint Schemes9050084 and 9050150, and CityU S
文摘Cerium dioxide, CeO2, is a potentially superior material in a myriad of areas, and many methods have been proposed to deposit single crystal CeO2 thin films. A novel fabrication technique utilizing dual plasma generated by metal vacuum arc (MEVVA) and radio frequency (RF) is discussed in this paper. We have recently conducted a systematic investigation to determine the optimal process window to deposit CeO2 thin films'on Si(100) substrates. The X-ray diffraction results show the existence of CeO2(100) in the as-deposited sample.
基金Projects (10472099,0672139) supported by the National Natural Science Foundation of ChinaProject (207079) supported by Key Project of Ministry of Education of China+1 种基金Project (05FJ2005) supported by Key Project of Scientific and Technological Department of Hunan ProvinceProject(06A072) supported by Key Project of Education Department of Hunan Province
文摘Metal-ferroelectric-insulator-silicon(MFIS) capacitors with Bi3.15Nd0.85Ti3O12(BNT) ferroelectric thin film were simulated using a commercial software Silvaco/Atlas,and the effects of applied voltage and insulator layer on capacitance-voltage(C-V) hysteresis loops and memory windows were investigated. For the MFIS capacitors with CeO2 insulator,with the increase of applied voltage from 2 V to 15 V,the C-V loops become wider and memory windows increase from 0.15 V to 1.27 V. When the thickness of CeO2 layer increases from 1 nm to 5 nm at the applied voltage of 5 V,the C-V loops become narrower and the memory windows decrease from 1.09 V to 0.36 V. For MFIS capacitors with different insulator layers(CeO2,HfO2,Y2O3,Si3N4 and SiO2),the high dielectric constants can make the C-V loops wider and improve the capacitor's memory window. The simulation results prove that Silvaco/Atlas is a powerful simulator for MFIS capacitor,and they are helpful to the fabrication of MFIS nonvolatile memory devices.
基金financially supported by the National Natural Science Foundation of China(61306137,51602114)the Research Fund for the Doctoral Program of Higher Education(20130142120075)+2 种基金the Fundamental Research Funds for the Central Universities(HUST:2016YXMS032)the Guangdong-Hong Kong joint innovation project(Grant No.2016A050503012)the Guangdong Natural Science Funds for Distinguished Young Scholars(Grant No.2015A030306044)
文摘Comparing with hot researches in absorber layer,window layer has attracted less attention in PbS quantum dot solar cells(QD SCs). Actually, the window layer plays a key role in exciton separation, charge drifting, and so on.Herein, ZnO window layer was systematically investigated for its roles in QD SCs performance. The physical mechanism of improved performance was also explored. It was found that the optimized ZnO films with appropriate thickness and doping concentration can balance the optical and electrical properties, and its energy band align well with the absorber layer for efficient charge extraction. Further characterizations demonstrated that the window layer optimization can help to reduce the surface defects, improve the heterojunction quality, as well as extend the depletion width. Compared with the control devices, the optimized devices have obtained an efficiency of 6.7% with an enhanced V_(oc) of 18%, J_(sc) of 21%, FF of 10%, and power conversion efficiency of 58%. The present work suggests a useful strategy to improve the device performance by optimizing the window layer besides the absorber layer.
