To overcome disadvantages of traditional worst-case execution time (WCET) analysis approaches, we propose a new WCET analysis approach based on independent paths for ARM programs. Based on the results of program flo...To overcome disadvantages of traditional worst-case execution time (WCET) analysis approaches, we propose a new WCET analysis approach based on independent paths for ARM programs. Based on the results of program flow analysis, it reduces and partitions the control flow graph of the program and obtains a directed graph. Using linear combinations of independent paths of the directed graph, a set of feasible paths can be generated that gives complete coverage in terms of the program paths considered. Their timing measurements and execution counts of program segments are derived from a limited number of measurements of an instrumented version of the program. After the timing measurement of the feasible paths are linearly expressed by the execution times of program seg-ments, a system of equations is derived as a constraint problem, from which we can obtain the execution times of program segments. By assigning the execution times of program segments to weights of edges in the directed graph, the WCET estimate can be calculated on the basis of graph-theoretical techniques. Comparing our WCET estimate with the WCET measurement obtained by the exhaustive measurement, the maximum error ratio is only 8.259 3 %. It is shown that the proposed approach is an effective way to obtain the safe and tight WCET estimate for ARM programs.展开更多
Real-time system timing analysis is crucial for estimating the worst-case execution time(WCET)of a program.To achieve this,static or dynamic analysis methods are used,along with targeted modeling of the actual hardwar...Real-time system timing analysis is crucial for estimating the worst-case execution time(WCET)of a program.To achieve this,static or dynamic analysis methods are used,along with targeted modeling of the actual hardware system.This literature review focuses on calculating WCET for multi-core processors,providing a survey of traditional methods used for static and dynamic analysis and highlighting the major challenges that arise from different program execution scenarios on multi-core platforms.This paper outlines the strengths and weaknesses of current methodologies and offers insights into prospective areas of research on multi-core analysis.By presenting a comprehensive analysis of the current state of research on multi-core processor analysis for WCET estimation,this review aims to serve as a valuable resource for researchers and practitioners in the field.展开更多
Consensus of creativity research suggests that the measurement of both originality and valuableness is necessary when designing creativity tasks.However,few studies have emphasized valuableness when exploring underlyi...Consensus of creativity research suggests that the measurement of both originality and valuableness is necessary when designing creativity tasks.However,few studies have emphasized valuableness when exploring underlying neural substrates of creative thinking.The present study employs product-based creativity tasks that measure both originality and valuableness in an exploration of the dynamic relationship between the default mode(DMN),executive control(ECN),and salience(SN)networks through time windows.This methodology highlights relevance,or valuableness,in creativity evaluation as opposed to divergent thinking tasks solely measuring originality.The researchers identified seven brain regions belonging to the ECN,DMN,and SN as regions of interest(ROIs),as well as four representative seeds to analyze functional connectivity in 25 college student participants.Results showed that all of the identified ROIs were involved during the creative task.The insula,precuneus,and ventrolateral prefrontal cortex(vlPFC)remained active across all stages of product-based creative thinking.Moreover,the connectivity analyses revealed varied interaction patterns of DMN,ECN,and SN at different thinking stages.The integrated findings of the whole brain,ROI,and connectivity analyses suggest a trend that the DMN and SN(which relate to bottom-up thinking)attenuate as time proceeds,whereas the vlPFC(which relates to top-down thinking)gets stronger at later stages;these findings reflect the nature of our creativity tasks and decision-making of valuableness in later stages.Based on brain region activation throughout execution of the task,we propose that product-based creative process may include three stages:exploration and association,incubation and insight,and finally,evaluation and decision making.This model provides a thinking frame for further research and classroom instruction.展开更多
In many real-time resource-constrained embedded systems, highly-predictable system behavior is a key design requirement. The “time-triggered co-operative” (TTC) scheduling algorithm provides a good match for a wide ...In many real-time resource-constrained embedded systems, highly-predictable system behavior is a key design requirement. The “time-triggered co-operative” (TTC) scheduling algorithm provides a good match for a wide range of low-cost embedded applications. As a consequence of the resource, timing, and power constraints, the implementation of such algorithm is often far from trivial. Thus, basic implementation of TTC algorithm can result in excessive levels of task jitter which may jeopardize the predictability of many time-critical applications using this algorithm. This paper discusses the main sources of jitter in earlier TTC implementations and develops two alternative implementations – based on the employment of “sandwich delay” (SD) mechanisms – to reduce task jitter in TTC system significantly. In addition to jitter levels at task release times, we also assess the CPU, memory and power requirements involved in practical implementations of the proposed schedulers. The paper concludes that the TTC scheduler implementation using “multiple timer interrupt” (MTI) technique achieves better performance in terms of timing behavior and resource utilization as opposed to the other implementation which is based on a simple SD mechanism. Use of MTI technique is also found to provide a simple solution to “task overrun” problem which may degrade the performance of many TTC systems.展开更多
The paper presents the embedded real-time software-oriented requirements engineering environment—SREZ. It involves the whole process of software requirements engineering, including the definition, analysis and checki...The paper presents the embedded real-time software-oriented requirements engineering environment—SREZ. It involves the whole process of software requirements engineering, including the definition, analysis and checking of requirements ,specifications. We first explain the principles of the executable specification language RTRSM. Subsequently, we introduce the main functions of SREE, illustrate the methods and techniques of checking requirements specifications, especially how to perform simulation execution, combining prototyping method with RTRSM and animated representations. At last, we compare the SREE with other requirements specifications methods and make a summary for SREE's advantages.展开更多
In order to investigate the characteristics of sensorimotor cortex during motor execution(ME), voluntary, stimulated and imaginary finger flexions were performed by ten volunteer subjects. Electroencephalogram(EEG) da...In order to investigate the characteristics of sensorimotor cortex during motor execution(ME), voluntary, stimulated and imaginary finger flexions were performed by ten volunteer subjects. Electroencephalogram(EEG) data were recorded according to the modified 10-20 International EEG System. The patterns were compared by the analysis of the motion-evoked EEG signals focusing on the contralateral(C3) and ipsilateral(C4) channels for hemispheric differences. The EEG energy distributions at alpha(8—13 Hz), beta(14—30 Hz) and gamma(30—50 Hz) bands were computed by wavelet transform(WT) and compared by the analysis of variance(ANOVA). The timefrequency(TF) analysis indicated that there existed a contralateral dominance of alpha post-movement event-related synchronization(ERS) pattern during the voluntary task, and that the energy of alpha band increased in the ipsilateral area during the stimulated(median nerve of wrist) task. Besides, the contralateral alpha and beta event-related desynchronization(ERD) patterns were observed in both stimulated and imaginary tasks. Another significant difference was found in the mean power values of gamma band(p<0.01)between the imaginary and other tasks. The results show that significant hemispheric differences such as alpha and beta band EEG energy distributions and TF changing phenomena(ERS/ERD) were found between C3 and C4 areas during all of the three patterns. The largest energy distribution was always at the alpha band for each task.展开更多
基金Supported by the National High Technology Research and Development Program of China(863 Program,2009AA011705)the National Natural Science Foundation of China(60903033)
文摘To overcome disadvantages of traditional worst-case execution time (WCET) analysis approaches, we propose a new WCET analysis approach based on independent paths for ARM programs. Based on the results of program flow analysis, it reduces and partitions the control flow graph of the program and obtains a directed graph. Using linear combinations of independent paths of the directed graph, a set of feasible paths can be generated that gives complete coverage in terms of the program paths considered. Their timing measurements and execution counts of program segments are derived from a limited number of measurements of an instrumented version of the program. After the timing measurement of the feasible paths are linearly expressed by the execution times of program seg-ments, a system of equations is derived as a constraint problem, from which we can obtain the execution times of program segments. By assigning the execution times of program segments to weights of edges in the directed graph, the WCET estimate can be calculated on the basis of graph-theoretical techniques. Comparing our WCET estimate with the WCET measurement obtained by the exhaustive measurement, the maximum error ratio is only 8.259 3 %. It is shown that the proposed approach is an effective way to obtain the safe and tight WCET estimate for ARM programs.
基金supported by ZTE Industry-University-Institute Cooperation Funds under Grant No.2022ZTE09.
文摘Real-time system timing analysis is crucial for estimating the worst-case execution time(WCET)of a program.To achieve this,static or dynamic analysis methods are used,along with targeted modeling of the actual hardware system.This literature review focuses on calculating WCET for multi-core processors,providing a survey of traditional methods used for static and dynamic analysis and highlighting the major challenges that arise from different program execution scenarios on multi-core platforms.This paper outlines the strengths and weaknesses of current methodologies and offers insights into prospective areas of research on multi-core analysis.By presenting a comprehensive analysis of the current state of research on multi-core processor analysis for WCET estimation,this review aims to serve as a valuable resource for researchers and practitioners in the field.
文摘Consensus of creativity research suggests that the measurement of both originality and valuableness is necessary when designing creativity tasks.However,few studies have emphasized valuableness when exploring underlying neural substrates of creative thinking.The present study employs product-based creativity tasks that measure both originality and valuableness in an exploration of the dynamic relationship between the default mode(DMN),executive control(ECN),and salience(SN)networks through time windows.This methodology highlights relevance,or valuableness,in creativity evaluation as opposed to divergent thinking tasks solely measuring originality.The researchers identified seven brain regions belonging to the ECN,DMN,and SN as regions of interest(ROIs),as well as four representative seeds to analyze functional connectivity in 25 college student participants.Results showed that all of the identified ROIs were involved during the creative task.The insula,precuneus,and ventrolateral prefrontal cortex(vlPFC)remained active across all stages of product-based creative thinking.Moreover,the connectivity analyses revealed varied interaction patterns of DMN,ECN,and SN at different thinking stages.The integrated findings of the whole brain,ROI,and connectivity analyses suggest a trend that the DMN and SN(which relate to bottom-up thinking)attenuate as time proceeds,whereas the vlPFC(which relates to top-down thinking)gets stronger at later stages;these findings reflect the nature of our creativity tasks and decision-making of valuableness in later stages.Based on brain region activation throughout execution of the task,we propose that product-based creative process may include three stages:exploration and association,incubation and insight,and finally,evaluation and decision making.This model provides a thinking frame for further research and classroom instruction.
文摘In many real-time resource-constrained embedded systems, highly-predictable system behavior is a key design requirement. The “time-triggered co-operative” (TTC) scheduling algorithm provides a good match for a wide range of low-cost embedded applications. As a consequence of the resource, timing, and power constraints, the implementation of such algorithm is often far from trivial. Thus, basic implementation of TTC algorithm can result in excessive levels of task jitter which may jeopardize the predictability of many time-critical applications using this algorithm. This paper discusses the main sources of jitter in earlier TTC implementations and develops two alternative implementations – based on the employment of “sandwich delay” (SD) mechanisms – to reduce task jitter in TTC system significantly. In addition to jitter levels at task release times, we also assess the CPU, memory and power requirements involved in practical implementations of the proposed schedulers. The paper concludes that the TTC scheduler implementation using “multiple timer interrupt” (MTI) technique achieves better performance in terms of timing behavior and resource utilization as opposed to the other implementation which is based on a simple SD mechanism. Use of MTI technique is also found to provide a simple solution to “task overrun” problem which may degrade the performance of many TTC systems.
基金Supported by the National Natural Science Foun-dation of China(69873035) the K.C. Wong Education Foundation,Hong Kong,China
文摘The paper presents the embedded real-time software-oriented requirements engineering environment—SREZ. It involves the whole process of software requirements engineering, including the definition, analysis and checking of requirements ,specifications. We first explain the principles of the executable specification language RTRSM. Subsequently, we introduce the main functions of SREE, illustrate the methods and techniques of checking requirements specifications, especially how to perform simulation execution, combining prototyping method with RTRSM and animated representations. At last, we compare the SREE with other requirements specifications methods and make a summary for SREE's advantages.
基金Supported by the National Natural Science Foundation of China(No.81222021,No.61172008,No.81171423)National Key Technology Research and Development Program of the Ministry of Science and Technology of China(No.2012BAI34B02)Program for New Century Excellent Talents in University of the Ministry of Education of China(No.NCET-10-0618)
文摘In order to investigate the characteristics of sensorimotor cortex during motor execution(ME), voluntary, stimulated and imaginary finger flexions were performed by ten volunteer subjects. Electroencephalogram(EEG) data were recorded according to the modified 10-20 International EEG System. The patterns were compared by the analysis of the motion-evoked EEG signals focusing on the contralateral(C3) and ipsilateral(C4) channels for hemispheric differences. The EEG energy distributions at alpha(8—13 Hz), beta(14—30 Hz) and gamma(30—50 Hz) bands were computed by wavelet transform(WT) and compared by the analysis of variance(ANOVA). The timefrequency(TF) analysis indicated that there existed a contralateral dominance of alpha post-movement event-related synchronization(ERS) pattern during the voluntary task, and that the energy of alpha band increased in the ipsilateral area during the stimulated(median nerve of wrist) task. Besides, the contralateral alpha and beta event-related desynchronization(ERD) patterns were observed in both stimulated and imaginary tasks. Another significant difference was found in the mean power values of gamma band(p<0.01)between the imaginary and other tasks. The results show that significant hemispheric differences such as alpha and beta band EEG energy distributions and TF changing phenomena(ERS/ERD) were found between C3 and C4 areas during all of the three patterns. The largest energy distribution was always at the alpha band for each task.