Maria Valtorta (1897-1961, Italian mystic)—bedridden since 1934 because paralyzed—wrote in Italian 13,193 pages of 122 school notebooks concerning alleged mystical visions on Jesus’ life, during World War II and fe...Maria Valtorta (1897-1961, Italian mystic)—bedridden since 1934 because paralyzed—wrote in Italian 13,193 pages of 122 school notebooks concerning alleged mystical visions on Jesus’ life, during World War II and few following years. The contents—about 2.64 million words—are now scattered in different books. She could write from 2 to 6 hours without pausing, with steady speed, and twice in the same day. She never made corrections and was very proficient in Italian. We have studied her writing activity concerning her alleged mystical experience with the main scope of establishing the time sequence of daily writing. This is possible because she diligently annotated the date of almost every text. We have reconstructed the time series of daily words and have converted them into time series of writing time, by assuming a realistic speed of 20 words per minute, a reliable average value of fast handwriting speed, applicable to Maria Valtorta. She wrote for 1340 days, about 3.67 years of equivalent contiguous writing time, mostly concentrated in the years 1943 to 1948. This study is a first approach in evaluating the effort done, in terms of writing time, by a mystic turned out to be a very effective literary author, whose texts are interesting to read per se, beyond any judgement—not of concern here—on her alleged visions.展开更多
In this paper, a novel 10 Transistor Static Random Access Memory (SRAM) cell is proposed. Read and Write bit lines are decoupled in the proposed cell. Feedback loop-cutting with single bit line write scheme is employe...In this paper, a novel 10 Transistor Static Random Access Memory (SRAM) cell is proposed. Read and Write bit lines are decoupled in the proposed cell. Feedback loop-cutting with single bit line write scheme is employed in the 10 Transistor SRAM cell to reduce active power consumption during the write operation. Read access time and write access time are measured for proposed cell architecture based on Eldo SPICE simulation using TSMC based 90 nm Complementary Metal Oxide Semiconductor (CMOS) technology at various process corners. Leakage current measurements made on hold mode of operation show that proposed cell architecture is having 12.31 nano amperes as compared to 40.63 nano amperes of the standard 6 Transistor cell. 10 Transistor cell also has better performance in terms of leakage power as compared to 6 Transistor cell.展开更多
文摘Maria Valtorta (1897-1961, Italian mystic)—bedridden since 1934 because paralyzed—wrote in Italian 13,193 pages of 122 school notebooks concerning alleged mystical visions on Jesus’ life, during World War II and few following years. The contents—about 2.64 million words—are now scattered in different books. She could write from 2 to 6 hours without pausing, with steady speed, and twice in the same day. She never made corrections and was very proficient in Italian. We have studied her writing activity concerning her alleged mystical experience with the main scope of establishing the time sequence of daily writing. This is possible because she diligently annotated the date of almost every text. We have reconstructed the time series of daily words and have converted them into time series of writing time, by assuming a realistic speed of 20 words per minute, a reliable average value of fast handwriting speed, applicable to Maria Valtorta. She wrote for 1340 days, about 3.67 years of equivalent contiguous writing time, mostly concentrated in the years 1943 to 1948. This study is a first approach in evaluating the effort done, in terms of writing time, by a mystic turned out to be a very effective literary author, whose texts are interesting to read per se, beyond any judgement—not of concern here—on her alleged visions.
文摘In this paper, a novel 10 Transistor Static Random Access Memory (SRAM) cell is proposed. Read and Write bit lines are decoupled in the proposed cell. Feedback loop-cutting with single bit line write scheme is employed in the 10 Transistor SRAM cell to reduce active power consumption during the write operation. Read access time and write access time are measured for proposed cell architecture based on Eldo SPICE simulation using TSMC based 90 nm Complementary Metal Oxide Semiconductor (CMOS) technology at various process corners. Leakage current measurements made on hold mode of operation show that proposed cell architecture is having 12.31 nano amperes as compared to 40.63 nano amperes of the standard 6 Transistor cell. 10 Transistor cell also has better performance in terms of leakage power as compared to 6 Transistor cell.
