Fluorination-mitigated high-current degradation of amorphous InGaZnO thin-film transistors

As growing applications demand higher driving currents of oxide semiconductor thin-film transistors(TFTs),severe instabilities and even hard breakdown under high-current stress(HCS)become critical challenges.In this work,the triggering voltage of HCS-induced self-heating(SH)degradation is defined in the output characteristics of amorphous indium-galliumzinc oxide(a-IGZO)TFTs,and used to quantitatively evaluate the thermal generation process of channel donor defects.The fluorinated a-IGZO(a-IGZO:F)was adopted to effectively retard the triggering of the self-heating(SH)effect,and was supposed to originate from the less population of initial deep-state defects and a slower rate of thermal defect transition in a-IGZO:F.The proposed scheme noticeably enhances the high-current applications of oxide TFTs.

Advances in mobility enhancement of ITZO thin-film transistors:a review

Indium-tin-zinc oxide(ITZO)thin-film transistor(TFT)technology holds promise for achieving high mobility and offers significant opportunities for commercialization.This paper provides a review of progress made in improving the mobility of ITZO TFTs.This paper begins by describing the development and current status of metal-oxide TFTs,and then goes on to explain the advantages of selecting ITZO as the TFT channel layer.The evaluation criteria for TFTs are subsequently introduced,and the reasons and significance of enhancing mobility are clarified.This paper then explores the development of high-mobility ITZO TFTs from five perspectives:active layer optimization,gate dielectric optimization,electrode optimization,interface optimization,and device structure optimization.Finally,a summary and outlook of the research field are presented.

Influence of Post-Annealing on Electrical Characteristics of Thin-Film Transistors with Atomic-Layer-Deposited ZnO-Channel/Al_2O_3-Dielectric

High-performance thin-film transistors （TFTs） with a low thermal budget are highly desired for flexible electronic applications. In this work, the TFTs with atomic layer deposited ZnO-channel/Al2O3-dielectric are fabricated under the maximum process temperature of 200℃. First, we investigate the effect of post-annealing environment such as N2, H2-N2 （4%） and O2 on the device performance, revealing that o2 annealing can greatly enhance the device performance. Further, we compare the influences of annealing temperature and time on the device performance. It is found that long anneMing at 200℃is equivalent to and even outperforms short annealing at 300℃. Excellent electrical characteristics of the TFTs are demonstrated after 02 anneMing at 200℃ for 35 rain, including a low off-current of 2.3 × 10-13 A, a small sub-threshold swing of 245 m V/dec, a large on/off current ratio of 7.6×10s, and a high electron effective mobility of 22.1cm2/V.s. Under negative gate bias stress at -10 V, the above devices show better electrical stabilities than those post-annealed at 300℃. Thus the fabricated high-performance ZnO TFT with a low thermal budget is very promising for flexible electronic applications.

High-Performance Photo-Modulated Thin-Film Transistor Based on Quantum dots/Reduced Graphene Oxide Fragment-Decorated ZnO Nanowires

In this paper, a photo-modulated transistor based on the thin-film transistor structure was fabricated on the flexible substrate by spin-coating and magnetron sputtering. A novel hybrid material that composed of Cd Se quantum dots and reduced graphene oxide(RGO) fragment-decorated ZnO nanowires was synthesized to overcome the narrow optical sensitive waveband and enhance the photo-responsivity. Due to the enrichment of the interface and heterostructure by RGO fragments being utilized, the photo-responsivity of the transistor was improved to 2000 AW^(-1) and the photo-sensitive wavelength was extended from ultraviolet to visible. In addition, a positive back-gate voltage was employed to reduce the Schottky barrier width of RGO fragments and ZnO nanowires. As a result, the amount of carriers was increased by 10 folds via the modulation of back-gate voltage. With these inherent properties, such as integrated circuit capability and wide optical sensitive waveband, the transistor will manifest great potential in the future applications in photodetectors.

High-performance amorphous In–Ga–Zn–O thin-film transistor nonvolatile memory with a novel p-SnO/n-SnO_(2) heterojunction charge trapping stack

Amorphous In–Ga–Zn–O(a-IGZO)thin-film transistor(TFT)memories with novel p-SnO/n-SnO_(2) heterojunction charge trapping stacks(CTSs)are investigated comparatively under a maximum fabrication temperature of 280℃.Compared to a single p-SnO or n-SnO_(2) charge trapping layer(CTL),the heterojunction CTSs can achieve electrically programmable and erasable characteristics as well as good data retention.Of the two CTSs,the tunneling layer/p-SnO/nSnO_(2)/blocking layer architecture demonstrates much higher program efficiency,more robust data retention,and comparably superior erase characteristics.The resulting memory window is as large as 6.66 V after programming at 13 V/1 ms and erasing at-8 V/1 ms,and the ten-year memory window is extrapolated to be 4.41 V.This is attributed to shallow traps in p-SnO and deep traps in n-SnO_(2),and the formation of a built-in electric field in the heterojunction.

Positive gate-bias temperature instability of ZnO thin-film transistor

The positive gate-bias temperature instability of a radio frequency （RF） sputtered ZnO thin-film transistor （ZnO TFT） is investigated. Under positive gate-bias stress, the saturation drain current and OFF-state current decrease, and the threshold voltage shifts toward the positive direction. The stress amplitude and stress temperature are considered as important factors in threshold-voltage instability, and the time dependences of threshold voltage shift under various bias temperature stress conditions could be described by a stretched-exponential equation. Based on the analysis of hysteresis behaviors in current- voltage and capacitance-voltage characteristics before and after the gate-bias stress, it can be clarified that the threshold- voltage shift is predominantly attributed to the trapping of negative charge carriers in the defect states located at the gate- dielectric/channel interface.

Concise Modeling of Amorphous Dual-Gate In-Ga-Zn-O Thin-Film Transistors for Integrated Circuit Designs

An analytical model for current-voltage behavior of amorphous In-Ga-Zn-O thin-film transistors（a-IGZO TFTs）with dual-gate structures is developed.The unified expressions for synchronous and asynchronous operating modes are derived on the basis of channel charges,which are controlled by gate voltage.It is proven that the threshold voltage of asynchronous dual-gate IGZO TFTs is adjusted in proportion to the ratio of top insulating capacitance to the bottom insulating capacitance（C_（TI）/C_（BI））.Incorporating the proposed model with Verilog-A,a touch-sensing circuit using dual-gate structure is investigated by SPICE simulations.Comparison shows that the touch sensitivity is increased by the dual-gate IGZO TFT structure.

Electrical properties of zinc-oxide-based thin-film transistors using strontium-oxide-doped semiconductors

Strontium-zinc-oxide（SrZnO） films forming the semiconductor layers of thin-film transistors（TFTs） are deposited by using ion-assisted electron beam evaporation. Using strontium-oxide-doped semiconductors, the off-state current can be dramatically reduced by three orders of magnitude. This dramatic improvement is attributed to the incorporation of strontium, which suppresses carrier generation, thereby improving the TFT. Additionally, the presence of strontium inhibits the formation of zinc oxide（ZnO） with the hexagonal wurtzite phase and permits the formation of an unusual phase of ZnO, thus significantly changing the surface morphology of ZnO and effectively reducing the trap density of the channel.

棒状纳米ZnO薄膜晶体管效应的测定

分别采用水热法和微乳法制得了两种直径为10～40nm和60～70nm的棒状纳米ZnO材料;然后将制得的纳米材料乙醇溶液旋涂到石英基片上,将其中一部分旋涂膜进行煅烧,最后将经过煅烧和未经过煅烧的旋涂膜基片采用top-contact的方法镀上电极制成薄膜晶体管进行场效应的测定;实验表明:对于直径不同和同种样品旋涂膜经不同处理的场效应参数存在明显的差异,特别是电子迁移率,直径较大的未经煅烧的纳米ZnO旋涂膜的电子迁移率可以达到μ=156cm2V-1s-1。

高性能双栅复合介质ZnO薄膜晶体管的模拟

提出ZnO薄膜晶体管的一种新型结构——双栅复合介质结构,并利用ATLAS软件对双栅复合介质结构与双栅单介质结构进行仿真。对比分析结果表明,采用复合介质材料可以明显提高器件的电学特性,在相同偏置条件下,双栅复合介质结构饱和电流为5.5×10-5 A,阈值电压为5.83V,亚阈值斜率为0.128V/dec,开关电流比为109;双栅单介质结构相应值分别为1.3×10-7 A、15.5V、0.297V/dec和108。通过晶界势垒高度随VGS变化分析了新型结构阈值电压降低的物理机制。

White Light Emission from the Composite System of ZnO/Porous Si

We report that the composites of ZnO/porous Si （PS） can exhibit intensively white photoluminescence （PL） under proper excitation wavelength. The PS sample is formed by electrochemical anodization of n-type （111） silicon. ZnO films are then deposited on the PS surface by pulsed laser deposition （PLD）. ZnO is transparent in the visible region, so the red PL from PS can be transmitted through the ZnO films. White PL from the ZnO layer on PS can be obtained, which consists of blue-green emission from ZnO and red emission from PS. The x-ray diffraction （XRD） pattern shows that the ZnO films deposited on PS surface are non-crystalline. Due to the roughness of the PS surface, some cracks appear in the ZnO films, which could be seen from the scanning electron microscopy （SEM） images.

Analytical drain current model for amorphous IGZO thin-film transistors in above-threshold regime

An analytical drain current model is presented for amorphous In-Ga-Zn-oxide thin-film transistors in the above-threshold regime,assuming an exponential trap states density within the bandgap.Using a charge sheet approximation,the trapped and free charge expressions are calculated,then the surface potential based drain current expression is developed.Moreover,threshold voltage based drain current expressions are presented using the Taylor expansion to the surface potential based drain current expression.The calculated results of the surface potential based and threshold voltage based drain current expressions are compared with experimental data and good agreements are achieved.

Diffusion-activated high performance ZnSnO/Yb_(2)O_(3) thin film transistors and application in low-voltage-operated logic circuits

The flourishing metal-oxide high-k dielectric materials have been regarded as the vital components of low voltage operated flexible transparent electronic devices.We herein report that ytterbium oxide(Yb_(2)O_(3))and ZnSnO(ZTO)thin films were firstly integrated into ZTO-based thin film transistors(TFTs)with superior performance.Results have indicated that the 500℃-annealed ZTO/Yb_(2)O_(3) TFTs possess the large saturation mobility of 9.1 cm^(2) V-1S^(-1) and the high on/off current ratio of 2.15×10^(7),which even surpass those of reported In-based TFTs.The deteriorative electrical properties in the aging process can be attributed to the carrier capture mechanism.However,the 460℃-processed TFTs demonstrate a tenfold increase in saturated mobility and an increase in on/off current ratio after 10 days aging.The inspiring electrical properties are attributed to the diffusion-activated carrier enhancement mechanism and electrons donor role of water molecular,which introduces a facile method to boost the device performance at lower processing temperatures.The neglected threshold voltage variations of 0.06 V and-0.2V have been detected after bias stability experiments.The superior bias stability can be attributed to the charge delay effect induced by the continuous electric field.Meanwhile,the ultrahigh on/off current ratio of 1.1×10^(7) and the recoverable transferring performance have verified the aging-activated mechanism.To confirm its potential application in digital circuits,a resistor-loaded inverter with gain of 5.6 has been constructed and good dynamic response behavior have been detected at a low voltage of 2V.As a result,it can be concluded that the high temperature annealing TFTs need immediate encapsulation,while the performance of the lower temperature processing samples can be optimized after aging treatment,indicating the potential prospect in low power consumption large-scale flexible transparent devices.

Nb/Nd共掺Bi_4Ti_3O_(12)对ZnO基薄膜晶体管性能的影响

利用化学溶液沉积(CSD)法,在Pt/Ti/SiO2/Si(100)衬底上成功制备以B3.15Nd0.85Ti3-x NbxO12(BNTNx,x=0.01,0.03,0.05,0.07)薄膜作为栅介质层、以ZnO薄膜作为有源层的铁电薄膜晶体管(ZnO/BNTN铁电TFT)。研究了Nb含量对BNTN薄膜微结构、介电和铁电性能的影响。结果表明,BNTN0.03薄膜的剩余极化(2 Pr)最大(71.4μC/cm2),介电常数最大(370)。测得BNTNx薄膜的居里温度约为410℃,介电损耗(tanδ)约为0.02。ZnO/BNTN铁电TFT相比ZnO/SiO2层TFT,有较好的输出特性和转移特性,其阈值电压、沟道迁移率、存储窗口和开关电流比分别达到了2.5V、5.68cm2/Vs、1.5V和1.8×105。

Band-like transport in non-fullerene acceptor semiconductor Y6

The recently reported non-fullerene acceptor(NFA)Y6 has been extensively investigated for high-performance organic solar cells.However,its charge transport property and physics have not been fully studied.In this work,we acquired a deeper understanding of the charge transport in Y6 by fabricating and characterizing thin-film transistors(TFTs),and found that the electron mobility of Y6 is over 0.3-0.4 cm^(2)/(V⋅s)in top-gate bottom-contact devices,which is at least one order of magnitude higher than that of another well-known NFA ITIC.More importantly,we observed band-like transport in Y6 spin-coated films through temperature-dependent measurements on TFTs.This is particularly amazing since such transport behavior is rarely seen in polycrystalline organic semiconductor films.Further morphology characterization and discussions indicate that the band-like transport originates from the unique molecule packing motif of Y6 and the special phase of the film.As such,this work not only demonstrates the superior charge transport property of Y6,but also suggests the great potential of developing high-mobility n-type organic semiconductors,on the basis of Y6.