Inhomogeneity of Grain Boundaries of ZnO Varistor

The zinc oxide varistor with a low threshold voltage and large grain size was derived with ZnO crystalline seeds from a molten salt process The chemical composition and I-V characteristics of single grains and single grain boundaries were determined by means of energy dispersive spectrum (EDS) and microcontact measurement respectively. Temperatu re dependence of dielectric loss at various frequencies and voltage dependence of capacitance were carefully measured. Based on these experimental data. the barrier heights of giain boundaries are estimated to be 0.2. 0.5 and 0.6 eV respectively corresponding to thick, th in and direct contact grain boundaries. In addition. a computerized electrical circuit simufation is employed in simulating I-V characteristics of single grain boundary within ZnO varistor. By adjustjng parameters of resistor and diode, a general agreement between the measured data and simulated curves is achieved

Effect of grain boundary on electric performance of ZnO nanowire transistor with wrap-around gate

A novel grain boundary(GB) model characterized with different angles and positions in the nanowire was set up.By means of device simulator,the effects of grain boundary angle and location on the electrical performance of ZnO nanowire FET(Nanowire Field-Effect Transistor) with a wrap-around gate configuration,were explored.With the increase of the grain boundary angle,the electrical performance degrades gradually.When a grain boundary with a smaller angle,such as 5° GB,is located close to the source or drain electrode,the grain boundary is partially depleted by an electric field peak,which leads to the decrease of electron concentration and the degradation of transistor characteristics.When the 90° GB is located at the center of the nanowire,the action of the electric field is balanced out,so the electrical performance of transistor is better than that of the 90° GB located at the other positions.

DEGRADATION DUE TO ENERGY PULSE IN HIGH-ENERGY ZnO VARISTORS

The degradation phenomena due to the energy pulse in the high-energy ZnO varistors used for deexitation and overvoltage protection of hydroelectric generator are investigated. The energy pulse, obtained by releasing the energy stored in an inductor, can be equivalent to the combination of the DC field components and the energy component. The variations of the characterized voltages, nonlinear coefficients and pre-breakdown V-A characteristics, increase with the number of the applied energy pulse. The asymmetrical variations of the electric properties of the high-energy ZnO varistors after the energy pulse arise from the deformation of the double Schottky barriers due to the ion migration occuring in the depletion layer and in the grain boundary.

A grain boundary defect model for ZnO ceramic varistors by deep heat treatment

Studies on ZnO ceramic varistors by deep heat treatment at 650–900 C are reported. The current creep time curve exhibits a peak during the continuous action of a dc biasing voltage; the forwardV-l characteristic is improved rather than degraded after the action of the biasing voltage. We assume that the zinc interstitial cations Zni are out diffused rapidly and the concentration of Zni in the depletion layer is decreased rapidly during deep heat treatment; the oxygen anions O’o could be accumulated at the grain interface if the out diffusion quantity of Zni is not enough to react with the O’o; the current creep phenomenon above results from the migration of the interface O’o by the biasing voltage. We suggest an improved grain boundary defect model for the ZnO varistors by deep heat treatment, and examine the model using the experimental data of lifetime positron-annihilation spectroscopy.

A Grain Boundary Defect Model for ZnO Ceramic Varistors by Deep Heat Treatment

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Improvement of sintering,nonlinear electrical,and dielectric properties of ZnO-based varistors doped with TiO2

The effects of TiO2 on sintering and nonlinear electrical properties of（98.5-x）ZnO–0.5MnO2–0.5Co2O3-0.5Bi2O3–xTiO2（x = 0.3,0.5,0.7,0.9 mol%） ceramic varistors prepared by the ceramic technique are investigated in this work.The optimum sintering temperature of the prepared samples is deduced by determining the firing shrinkage and water absorption percentages.The optimum sintering temperature is found to be 1200℃,at which each of the samples shows a maximum firing shrinkage and minimum water absorption.Also minimum water absorption appears in a sample of x = 0.9 mol%.Higher sintering temperature and longer sintering time give rise to a reduction in bulk density due to the increased amount of porosity between the large grains of ZnO resulting from the rapid grain growth induced by the liquid phase sintering.The crystal size of ZnO decreases with increasing TiO2 doping.The addition of TiO2 improves the nonlinear coefficient and attains its maximum value at x = 0.7 mol% of TiO2,further addition negatively affects it.A decrease in capacitance consequently in the dielectric constant is recorded with increasing the frequency in a range of 30 kHz–200 kHz.The temperature and composition dependences of the dielectric constant and AC conductivity are also studied.The increase of temperature raises the dielectric constant because it increases ionic response to the field at any particular frequency.

Effects of cooling rate on the microstructure and electrical properties of Dy_2O_3-doped ZnO-based varistor ceramics

The microstructure, electrical properties, and density of Dy2O3-doped ZnO-based varistor ceramics, prepared using high-energy ball milling （HEBM） and sintered at 800℃, were investigated by increasing the cooling rate in the order of H （slow cooling in furnace） → L （cooling in furnace） → K （cooling in air）. With the increase in cooling rate, the grain size and density decreased, the breakdown voltage （VImA/mm） increased, and the nonlinear coefficient （α） and leakage current （IL） exhibited extremum. The sample with the cooling type L showed the best properties with the breakdown voltage of 2650 V/ram, o：of 20.3, IL of 5.2 laA, and density of 5.42 g/cm^3. The barrier height （ФB）, donor concentration （Nd）, density of the interface states （Nd）, and barrier width （ω） all exhibited extremum during the alteration in cooling rate. The different relative amount of Bi-rich phase and its distribution as well as the characteristic parameters of grain boundary, resulting from the alteration of cooling rate, led to the changes in the properties of varistor ceramics.

Preparation and characterization of layered low-voltage ZnO varistors

Double-layered, low-voltage ZnO varistors have been fabricated by feeding two kinds of ZnO powders into a die using dry extrusion molding. Compared with ZnO varistors fabricated by the conventional route, the layered ZnO varistors have larger non-linear coefficients, lower breakdown electric fields, and lower leakage current densities. The improvement in electrical performance of the layered low-voltage ZnO varistors is attributed to the asymmetric band structure at grain boundary between the two layers.

Percolation effects in dc degradation of ZnO varistors

For quantitative estimation of the degree of electrical disorder(electrical inhomogeneity)in ZnO varistor ceramics caused by a variation in the barrier height at different grain boundaries in a sample,the comparison of threshold electric fields(onsets of highly nonlinear current-voltage characteristics)in ceramics and single grain boundary(GB)is suggested and approved.At dc degradation similar behavior of the current-voltage characteristics of ZnO varistor ceramics and single GB is observed.The percolation model of Shklovskii-De Gennes is applicable for the description of a disorder in ZnO varistor ceramics.The degree of the disorder in ZnO varistor ceramics is not dependent on the duration of dc degradation at least at degradation time below 60 h.At voltages close to the onset of a highly nonlinear region of current-voltage characteristic the correlation radius of infinite cluster is~5 times greater than the average grain size.

Mechanism and Development of TiO_2-Doped ZnO-Bi_2O_3-Based Varistors

This paper reviews the history of ZnO varistor,discribes its properties and recenttechnological status and forecasts its evolution.The future development trend is to produce the low-voltage high-energy multi-layer ZnO varistors.After the two additives are classified by their functions,the effect mechanism of Bi_2O_3 and TiO_2 additives are researched theoretically.TiO_2 will make ZnO graingrow bigger and V_ImA/mm be depressed down.Especially the colloid TiO_2 additive in the scale ofnanometer brings about a new method to realize the low voltage of ZnO varistor,which resolves theproblem of how to disturb nanometer powder evenly.Moreover the sintering temperature has prominenteffect on the electrical properties of ZnO varistors.Generally,the appropriate sintering temperature forlow-voltage ZnO varistor ceramics should not be more than 1 250℃.These provide an effective methodand rationale for studying low-voltage ZnO varistors.

Microstructures and characteristics of deep trap levels in ZnO varistors doped with Y_2O_3

In this paper discussions on ZnO based varistor ceramics doped with different ratios of Y2O3 are presented.Analysis on the phase and microstructures of the samples indicates that an additional phase is detected in the samples doped with Y2O3,and the average grain size of the specimens decreases from about 9.2μm to 4.5μm,with an increase in the addition of Y2O3 from 0 mol%to 3 mol%.The corresponding varistor’s voltage gradient markedly increases from 462 V/mm to 2340 V/mm,while the nonlinear coefficient decreases from 22.3 to 11.5,respectively.Furthermore,the characteristics of deep trap levels in these ZnO samples are investigated by measuring their dielectric spectroscopies.The trap energy level and capture cross section evaluated by relaxation peak of the Cole-Cole plot vary slightly as the addition of Y2O3 increases.These traps may be ascribed to the intrinsic defects of ZnO lattice.

Effects of Composition of ZnO Ceramics Containing TiO_2 onVaristor Properties

The development of low-voltage ZnO varistor ceramics containing TiO2 is presented in this report. The varistor properties of ZnO ceramics with different compositions were measured, and microstructure of the ceramics was investigated by XRD and SEM. The results show that the addition of TiO2 is beneficial to the decrease of varistor voltage (V1mA). whereas it leads to the recession of nonlinear coefficient (α) and leakage current (lL). The varistor properties of ZnO ceramics containing TiO2 can be effectively improved by introducing moderate amount of pre-fabricated ZnO seed grains. The behaviors of TiO2 and seed grains, as well as the mechanisms by which TiO2 and seed grains influence varistor properties, are discussed.

不同类型冲击电流对ZnO压敏电阻老化的影响研究

为了比较不同类型冲击电流对氧化锌(ZnO)压敏电阻直流老化的影响,将相同类型的ZnO压敏电阻样品分别开展2 ms方波(峰值为2 kA)耐受试验和4/10μs冲击电流(峰值为100 kA)试验。实验结果表明,在1~3轮(3~9次)的冲击耐受下,2 ms方波对ZnO压敏电阻的老化特性能起到一定优化作用,而4/10μs大电流冲击则使得ZnO压敏电阻老化特性持续劣化。利用扫描电子显微镜(SEM)、光谱仪、数字源表研究其微观结构以及电气性能参数变化。结合实验结果分析原因,4/10μs冲击电流对ZnO压敏电阻的损伤程度大于2 ms方波冲击电流的损伤程度,更容易引起ZnO压敏电阻的老化,在1~3轮(3~9次)2 ms方波耐受下,可以改善压敏电阻老化特性,其原因在于冲击电流产生热效应使构成晶界势垒亚稳定成分填隙锌离子在晶界发生反应而降低其浓度,得到比冲击前更稳定的晶界结,从而提高了其老化特性。

Cr_(2)O_(3)对ZnO-Bi_(2)O_(3)基高压压敏陶瓷性能的影响

采用固相烧结法制备ZnO-Bi_(2)O_(3)-Co_(2)O_(3)-NiO-Mn_(3)O_(4)-SiO_(2)-Cr_(2)O_(3)压敏陶瓷,研究不同掺杂量的Cr_(2)O_(3)对ZnO压敏陶瓷的微观结构和电气性能的影响。通过X射线衍射仪(XRD)、场发射扫描电子显微镜(FESEM)及电化学工作站分别对样品的物相、微观形貌及电性能进行表征。结果表明:Cr_(2)O_(3)的加入不仅具有抑制ZnO晶粒异常生长和提升晶粒均匀分布的作用,而且能显著降低ZnO晶粒电阻,增加晶界电阻。在Cr_(2)O_(3)添加量为0%~0.21%(摩尔分数,下同)范围内,随着添加量的增大,压敏陶瓷的非线性系数表现为先增加后减小。当Cr_(2)O_(3)掺杂量为0.14%时,ZnO压敏陶瓷具有优异的电气性能:电位梯度E_(1 mA)=216 V·mm^(-1)、泄漏电流J_L=0.36μA·cm^(-2)、非线性系数α=25、残压比K=1.815、老化系数K_(ct)=0.647。此外,该压敏陶瓷在4/10μs波形下100 kA脉冲电流冲击2次后U_(1 mA)仍保持为初始的96.75%,表现出良好的冲击稳定性,在配电系统避雷器中具有巨大的应用潜力。

施主掺杂提高ZnO压敏电阻的冲击稳定性

研究了铝铟共掺杂对ZnO压敏电阻的微观结构和电学性能的影响,特别是浪涌冲击稳定行为。采用X射线衍射、扫描电子显微镜对ZnO压敏电阻的微观结构进行了表征,通过电流—电压测试、脉冲电流冲击测试和电容—电压测试对电性能进行了评估。结果表明:当Al^(3+)和In^(3+)掺杂量分别为0.0008 mol%和0.0033 mol%时,ZnO压敏电阻表现出了最佳的电性能;此时的电位梯度为95.3 V·mm^(-1)、非线性系数为74、残压比为2.43。另外,ZnO压敏电阻在8/20μs 10 k A电流下冲击20次后,正反压敏电压变化率分别为+3.30%和-6.67%。

ZnO压敏陶瓷的微波烧结

对用纳米粉体制备的ZnO压敏生坯进行了微波烧结，通过XRD、SEM分析和电性能测试，与普通烧结比较，微波烧结可使ZnO压敏材料快速成瓷，显著缩短烧结时间；在相同晶粒尺寸下，微波烧结温度更低，瓷体更致密；并能获得较好电性能．微波烧结为ZnO压敏陶瓷材料制备提供了一条新的、高效节能的途径．

ZnO压敏电阻残压比的影响因素分析

ZnO压敏电阻作为避雷器的核心元件,已经被广泛地应用于电力系统雷电防护设备之中。残压比是ZnO压敏电阻避雷器的重要参数,它决定了电力系统的过电压保护水平和电力设备绝缘要求。为此,分析了ZnO压敏电阻残压比的宏观影响因素,利用维诺网格模型和晶界导电模型研究了微结构参数和晶界参数对ZnO压敏电阻残压比的影响规律。晶粒尺寸、晶粒不均匀度、晶粒施主数密度和晶界表面态密度主要在参考电压区域影响残压比,而晶粒电阻率主要在残压区域影响残压比。基于相关分析结论,提出了低残压比ZnO压敏电阻的试验研究路线,为研究低残压比ZnO压敏电阻提供了基本的理论依据和指导方向。

Nb掺杂对ZnO压敏陶瓷电学性能的影响

研究了Nb2O5对ZnO压敏材料电学性能的影响。当x(Nb2O5)从0增加到1%时,ZnO压敏电阻的击穿电压从209V/mm降至0.70V/mm,40Hz时,样品电阻从0.21MΩ降至48.3Ω,1kHz时的相对介电常数从831增大到42200。晶界势垒高度测量表明:在实验范围内,Nb对势垒高度的影响较小。ZnO晶粒的变大是压敏电压急剧降低和介电常数增大的主要原因。对Nb掺杂量的增加引起样品阻抗减小的根源进行了解释。

TiO_2掺杂对低压ZnO压敏电阻性能的影响

研究了 Ti O2 掺杂量及制备工艺对 Zn O压敏电阻性能的影响。Ti O2 掺杂超过一定量时 ,压敏场强就不再降低 ,而非线性系数却一直下降 ,漏流迅速增大 ,使性能劣化。因此 ,要控制 Ti O2 掺杂量在适当范围内。粉料煅烧温度和烧成温度的高低也直接影响 Zn O压敏电阻性能。

Na掺杂对ZnO压敏材料电学性能的影响

研究了Na2CO3对ZnO压敏材料电学性能的影响。当掺入的Na2CO3之摩尔分数x从0增加到0.2%时,ZnO压敏材料的击穿电压从209 V/mm增加到934 V/mm,1 kHz时的相对介电常数从1 158降到57。晶界势垒高度测量表明:在实验范围内,Na对势垒高度的影响较小。ZnO晶粒的变小是压敏电压急剧升高和介电常数减小的主要原因。对Na2CO3掺杂量的增加引起ZnO晶粒减小的原因进行了解释。