This realization of a voltage-mode first order voltage-mode all pass filter (VM-APF) employing single current differencing differential input transconductance amplifier (CDDITA) as active component is presented. The p...This realization of a voltage-mode first order voltage-mode all pass filter (VM-APF) employing single current differencing differential input transconductance amplifier (CDDITA) as active component is presented. The proposed configuration employs one CDDITA along with two resistors and one grounded capacitor. The pole frequency and phase shift of proposed VM-APF are electronically tunable by transconductance of CDDITA. The proposed circuit is verified by SPICE simulations.展开更多
In this paper,the theory of uniform filter banks using all-pass tilters is furtherdeveloped.A new structure of two stage filter banks using all-pass filter is proposed,The pre-stage is half-band filter with period,the...In this paper,the theory of uniform filter banks using all-pass tilters is furtherdeveloped.A new structure of two stage filter banks using all-pass filter is proposed,The pre-stage is half-band filter with period,the post-stage is two sets of band-pass filter banks.Thepre-stage filter stop-band just controls the don’t-care-band of the post-stage filter banks usingall-pass polyphase,so as to realize a continuous stop-band property Moreover,a method ofsynthesizing filter bank is derived,which eliminates aliasing and amplitude distortions of theanalysis/synthesis system Finally,an example is given.展开更多
A down-conversion in-phase/quadrature （l/Q） mixer employing a folded-type topology, integrated with a passive differential quadrature all-pass filter （D-QAF）, in order to realize the final down-conversion stage of...A down-conversion in-phase/quadrature （l/Q） mixer employing a folded-type topology, integrated with a passive differential quadrature all-pass filter （D-QAF）, in order to realize the final down-conversion stage of a 60 GHz receiver architecture is presented in this work. Instead of employing conventional quadrature generation techniques such as a polyphase filter or a frequency divider tbr the local oscillator （LO） of the mixer, a passive D-QAF structure is employed. Fabricated in a 65 nm CMOS process, the mixer exhibits a voltage gain of 7-8 dB in an intermediate frequency （IF） band ranging from 10 MHz-1.75 GHz. A fixed LO frequency of 12 GHz is used to down-convert a radio frequency （RF） band of 10.25-13.75 GHz. The mixer displays a third order input referred intercept point （IIP3） ranging from -8.75 to -7.37 dBm for a fixed IF frequency of 10 MHz and a minimum single-sideband noise figure （SSB-NF） of 11.3 dB. The mixer draws a current of 6 mA from a 1.2 V supply voltage dissipating a power of 7.2 mW.展开更多
文摘This realization of a voltage-mode first order voltage-mode all pass filter (VM-APF) employing single current differencing differential input transconductance amplifier (CDDITA) as active component is presented. The proposed configuration employs one CDDITA along with two resistors and one grounded capacitor. The pole frequency and phase shift of proposed VM-APF are electronically tunable by transconductance of CDDITA. The proposed circuit is verified by SPICE simulations.
文摘In this paper,the theory of uniform filter banks using all-pass tilters is furtherdeveloped.A new structure of two stage filter banks using all-pass filter is proposed,The pre-stage is half-band filter with period,the post-stage is two sets of band-pass filter banks.Thepre-stage filter stop-band just controls the don’t-care-band of the post-stage filter banks usingall-pass polyphase,so as to realize a continuous stop-band property Moreover,a method ofsynthesizing filter bank is derived,which eliminates aliasing and amplitude distortions of theanalysis/synthesis system Finally,an example is given.
基金Project supported by the National High Technology Research and Development Program of China(No.2011AA010200)
文摘A down-conversion in-phase/quadrature （l/Q） mixer employing a folded-type topology, integrated with a passive differential quadrature all-pass filter （D-QAF）, in order to realize the final down-conversion stage of a 60 GHz receiver architecture is presented in this work. Instead of employing conventional quadrature generation techniques such as a polyphase filter or a frequency divider tbr the local oscillator （LO） of the mixer, a passive D-QAF structure is employed. Fabricated in a 65 nm CMOS process, the mixer exhibits a voltage gain of 7-8 dB in an intermediate frequency （IF） band ranging from 10 MHz-1.75 GHz. A fixed LO frequency of 12 GHz is used to down-convert a radio frequency （RF） band of 10.25-13.75 GHz. The mixer displays a third order input referred intercept point （IIP3） ranging from -8.75 to -7.37 dBm for a fixed IF frequency of 10 MHz and a minimum single-sideband noise figure （SSB-NF） of 11.3 dB. The mixer draws a current of 6 mA from a 1.2 V supply voltage dissipating a power of 7.2 mW.
