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A Portable Analog Lock-In Amplifier for Accurate Phase Measurement and Application in High-Precision Optical Oxygen Concentration Detection 被引量:2
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作者 Xi CHEN Jun CHANG +4 位作者 Fupeng WANG Zongliang WANG Wei WEI Yuanyuan LIU Zengguang QIN 《Photonic Sensors》 SCIE EI CAS CSCD 2017年第1期27-36,共10页
A portable analog lock-in amplifier capable of accurate phase detection is proposed in this paper. The proposed lock-in amplifier, which uses the dual-channel orthometric signals as the references to build the xy coor... A portable analog lock-in amplifier capable of accurate phase detection is proposed in this paper. The proposed lock-in amplifier, which uses the dual-channel orthometric signals as the references to build the xy coordinate system, can detect the relative phase between the input and x-axis based on trigonometric function. The sensitivity of the phase measurement reaches 0.014degree, and a detection precision of 0.1 degree is achieved. At the same time, the performance of the lock-in amplifier is verified in the high precision optical oxygen concentration detection. Experimental results reveal that the portable analog lock-in amplifier is accurate for phase detection applications. In the oxygen sensing experiments, 0.058% oxygen concentration resulted in 0.1 degree phase shift detected by the lock-in amplifier precisely. In addition, the lock-in amplifier is small and economical compared with the commercial lock-in equipments, so it can be easily integrated in many portable devices for industrial applications. 展开更多
关键词 Portable analog lock-in amplifier phase shift measurement high accuracy optical oxygen detection
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CMOS analog baseband circuitry for an IEEE 802.11 b/g/n WLAN transceiver
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作者 龚正 楚晓杰 +2 位作者 雷倩倩 林敏 石寅 《Journal of Semiconductors》 EI CAS CSCD 2012年第11期60-66,共7页
An analog baseband circuit for a direct conversion wireless local area network(WLAN) transceiver in a standard 0.13-μm CMOS occupying 1.26 mm^2 is presented.The circuit consists of active-RC receiver(RX) 4th orde... An analog baseband circuit for a direct conversion wireless local area network(WLAN) transceiver in a standard 0.13-μm CMOS occupying 1.26 mm^2 is presented.The circuit consists of active-RC receiver(RX) 4th order elliptic lowpass filters(LPFs),transmitter(TX) 3rd order Chebyshev LPFs,RX programmable gain amplifiers (PGAs) with DC offset cancellation(DCOC) servo loops,and on-chip output buffers.The RX baseband gain can be programmed in the range of -11 to 49 dB in 2 dB steps with 50-30.2 nV/(Hz)^(1/2) input referred noise(IRN) and a 21 to -41 dBm in-band 3rd order interception point(IIP3).The RX/TX LPF cutoff frequencies can be switched between 5 MHz,10 MHz,and 20 MHz to fulfill the multimode 802.11b/g/n requirements.The TX baseband gain of the I/Q paths are tuned separately from -1.6 to 0.9 dB in 0.1 dB steps to calibrate TX 1/Q gain mismatches.By using an identical integrator based elliptic filter synthesis method together with global compensation applied to the LPF capacitor array,the power consumption of the RX LPF is considerably reduced and the proposed chip draws 26.8 mA/8 mA by the RX/TX baseband paths from a 1.2 V supply. 展开更多
关键词 WLAN analog baseband active-RC filters PGA DCOC operational amplifiers
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A 14-bit 40-MHz analog front end for CCD application
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作者 王静宇 朱樟明 刘术彬 《Journal of Semiconductors》 EI CAS CSCD 2016年第6期141-151,共11页
A 14-bit,40-MHz analog front end(AFE) for CCD scanners is analyzed and designed.The proposed system incorporates a digitally controlled wideband variable gain amplifier(VGA) with nearly 42 dB gain range,a correlat... A 14-bit,40-MHz analog front end(AFE) for CCD scanners is analyzed and designed.The proposed system incorporates a digitally controlled wideband variable gain amplifier(VGA) with nearly 42 dB gain range,a correlated double sampler(CDS) with programmable gain functionality,a 14-bit analog-to-digital converter and a programmable timing core.To achieve the maximum dynamic range,the VGA proposed here can linearly amplify the input signal in a gain range from-1.08 to 41.06 dB in 6.02 dB step with a constant bandwidth.A novel CDS takes image information out of noise,and further amplifies the signal accurately in a gain range from 0 to 18 dB in0.035 dB step.A 14-bit ADC is adopted to quantify the analog signal with optimization in power and linearity.An internal timing core can provide flexible timing for CCD arrays,CDS and ADC.The proposed AFE was fabricated in SMIC 0.18 μm CMOS process.The whole circuit occupied an active area of 2.8×4.8 mm^2 and consumed360 mW.When the frequency of input signal is 6.069 MHz,and the sampling frequency is 40 MHz,the signal to noise and distortion(SNDR) is 70.3 dB,the effective number of bits is 11.39 bit. 展开更多
关键词 analog front end correlated double sampler variable gain amplifier ADC programmable clock
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