We propose a continuous analogy of Newton’s method with inner iteration for solving a system of linear algebraic equations. Implementation of inner iterations is carried out in two ways. The former is to fix the numb...We propose a continuous analogy of Newton’s method with inner iteration for solving a system of linear algebraic equations. Implementation of inner iterations is carried out in two ways. The former is to fix the number of inner iterations in advance. The latter is to use the inexact Newton method for solution of the linear system of equations that arises at each stage of outer iterations. We give some new choices of iteration parameter and of forcing term, that ensure the convergence of iterations. The performance and efficiency of the proposed iteration is illustrated by numerical examples that represent a wide range of typical systems.展开更多
A common current source, generally used to bias cross-coupled differential amplifiers in a transconductor, controls third harmonic distortion (HD3) poorly. Separate current sources are shown to provide better control ...A common current source, generally used to bias cross-coupled differential amplifiers in a transconductor, controls third harmonic distortion (HD3) poorly. Separate current sources are shown to provide better control on HD3) . In this paper, a detailed design and analysis is presented for a transconductor made using this biasing technique. The transconductor, in addition, is made to offer high Gm, low power dissipation and is designed for linearly tunable Gm with current mode load as one of the applications. The circuit exhibits HD3) of less than –43.7 dB, high current efficiency of 1.18 V-1 and Gm of 390 μS at 1 VGp-p @ 50 MHz. UMC 0.18 μm CMOS process technology is used for simulation at supply voltage of 1.8 V.展开更多
A single soft fault diagnosis method for analog circuit with tolerance based on particle swarm optimization （PSO） is proposed. The parameter deviation of circuit elements is defined as the element of particle. Node-...A single soft fault diagnosis method for analog circuit with tolerance based on particle swarm optimization （PSO） is proposed. The parameter deviation of circuit elements is defined as the element of particle. Node-voltage incremental equations based on the sensitivity analysis are built as constraints of a linear programming （LP） equation. Through inducing the penalty coefficient, the LP equation is set as the fitness function for the PSO program. After evaluating the best position of particles, the position of the optimal particle states whether the actual parameter is within tolerance range or not. Simulation result shows the effectiveness of the method.展开更多
Approximation techniques are useful for implementing pattern recognizers, communication decoders and sensory processing algorithms where computational precision is not critical to achieve the desired system level perf...Approximation techniques are useful for implementing pattern recognizers, communication decoders and sensory processing algorithms where computational precision is not critical to achieve the desired system level performance. In our previous work, we had proposed margin propagation (MP) as an efficient piece-wise linear (PWL) approximation technique to a log-sum-exp function and had demonstrated its advantages for implementing probabilistic decoders. In this paper, we present a systematic and a generalized approach for synthesizing analog piecewise-linear (PWL) computing circuits using the MP principle. MP circuits use only addition, subtraction and threshold operations and hence can be implemented using universal conservation principles like the Kirchoff's current law. Thus, unlike the conventional translinear CMOS current-mode circuits, the operation of the MP circuits are functionally similar in weak, moderate and strong inversion regimes of the MOS transistor making the design approach bias-scalable. This paper presents measured results from MP circuits prototyped in a 0.5μm standard CMOS process verifying the bias-scalable property. As an example, we apply the synthesis approach towards designing linear classifiers and verify its performance using measured results.展开更多
提出一种改进的反射式预失真电路,使其在相同功率区间上具有在线的补偿量调节能力。该电路对肖特基二极管不施加偏置电压,避免了因偏压改变而引起的补偿区间变化;在非线性产生电路中串联变容二极管,通过调节变容管的偏置电压,实现预失...提出一种改进的反射式预失真电路,使其在相同功率区间上具有在线的补偿量调节能力。该电路对肖特基二极管不施加偏置电压,避免了因偏压改变而引起的补偿区间变化;在非线性产生电路中串联变容二极管,通过调节变容管的偏置电压,实现预失真器补偿量的调节。采用该方案设计加工了工作于29~31 GHz频段的反射式预失真器,实测结果表明:将变容管偏置电压由0调节至6 V,在相同功率区间内,该预失真器的增益扩张由4.5增大至7.6 d B,相位扩张由3.4°增大至51.1°。展开更多
文摘We propose a continuous analogy of Newton’s method with inner iteration for solving a system of linear algebraic equations. Implementation of inner iterations is carried out in two ways. The former is to fix the number of inner iterations in advance. The latter is to use the inexact Newton method for solution of the linear system of equations that arises at each stage of outer iterations. We give some new choices of iteration parameter and of forcing term, that ensure the convergence of iterations. The performance and efficiency of the proposed iteration is illustrated by numerical examples that represent a wide range of typical systems.
文摘A common current source, generally used to bias cross-coupled differential amplifiers in a transconductor, controls third harmonic distortion (HD3) poorly. Separate current sources are shown to provide better control on HD3) . In this paper, a detailed design and analysis is presented for a transconductor made using this biasing technique. The transconductor, in addition, is made to offer high Gm, low power dissipation and is designed for linearly tunable Gm with current mode load as one of the applications. The circuit exhibits HD3) of less than –43.7 dB, high current efficiency of 1.18 V-1 and Gm of 390 μS at 1 VGp-p @ 50 MHz. UMC 0.18 μm CMOS process technology is used for simulation at supply voltage of 1.8 V.
基金supported by the Program for New Century Excellent Talents in University under Grant No.NCET-05-0804partly supported by Chinese National Programs for High Technology Research and Development under Grant No.2006AA06Z222
文摘A single soft fault diagnosis method for analog circuit with tolerance based on particle swarm optimization （PSO） is proposed. The parameter deviation of circuit elements is defined as the element of particle. Node-voltage incremental equations based on the sensitivity analysis are built as constraints of a linear programming （LP） equation. Through inducing the penalty coefficient, the LP equation is set as the fitness function for the PSO program. After evaluating the best position of particles, the position of the optimal particle states whether the actual parameter is within tolerance range or not. Simulation result shows the effectiveness of the method.
基金Supported by a Research Grant from The National Science Foundation(CCF:0728996)
文摘Approximation techniques are useful for implementing pattern recognizers, communication decoders and sensory processing algorithms where computational precision is not critical to achieve the desired system level performance. In our previous work, we had proposed margin propagation (MP) as an efficient piece-wise linear (PWL) approximation technique to a log-sum-exp function and had demonstrated its advantages for implementing probabilistic decoders. In this paper, we present a systematic and a generalized approach for synthesizing analog piecewise-linear (PWL) computing circuits using the MP principle. MP circuits use only addition, subtraction and threshold operations and hence can be implemented using universal conservation principles like the Kirchoff's current law. Thus, unlike the conventional translinear CMOS current-mode circuits, the operation of the MP circuits are functionally similar in weak, moderate and strong inversion regimes of the MOS transistor making the design approach bias-scalable. This paper presents measured results from MP circuits prototyped in a 0.5μm standard CMOS process verifying the bias-scalable property. As an example, we apply the synthesis approach towards designing linear classifiers and verify its performance using measured results.
文摘提出一种改进的反射式预失真电路,使其在相同功率区间上具有在线的补偿量调节能力。该电路对肖特基二极管不施加偏置电压,避免了因偏压改变而引起的补偿区间变化;在非线性产生电路中串联变容二极管,通过调节变容管的偏置电压,实现预失真器补偿量的调节。采用该方案设计加工了工作于29~31 GHz频段的反射式预失真器,实测结果表明:将变容管偏置电压由0调节至6 V,在相同功率区间内,该预失真器的增益扩张由4.5增大至7.6 d B,相位扩张由3.4°增大至51.1°。
