Low switching loss and increased short-circuit capability split-gate SiC trench MOSFET with p-type pillar

A split-gate SiC trench gate MOSFET with stepped thick oxide, source-connected split-gate(SG), and p-type pillar(ppillar) surrounded thick oxide shielding region(GSDP-TMOS) is investigated by Silvaco TCAD simulations. The sourceconnected SG region and p-pillar shielding region are introduced to form an effective two-level shielding, which reduces the specific gate–drain charge(Q_(gd,sp)) and the saturation current, thus reducing the switching loss and increasing the short-circuit capability. The thick oxide that surrounds a p-pillar shielding region efficiently protects gate oxide from being damaged by peaked electric field, thereby increasing the breakdown voltage(BV). Additionally, because of the high concentration in the n-type drift region, the electrons diffuse rapidly and the specific on-resistance(Ron,sp) becomes smaller.In the end, comparing with the bottom p~+ shielded trench MOSFET(GP-TMOS), the Baliga figure of merit(BFOM,BV~2/R_(on,sp)) is increased by 169.6%, and the high-frequency figure of merit(HF-FOM, R_(on,sp) × Q_(gd,sp)) is improved by310%, respectively.

Nullors, and Nullor Circuits;There Applications in Symbolic Circuit Analysis and Design

The objective in this presentation is to introduce some of the unique properties and applications of nullors in active circuit analysis and designs. The emphasis is to discuss the role nullors can play in symbolic representation of transfer functions. To show this we adopt the topological platform for the circuit analysis and use a recently developed Admittance Method (AM) to achieve the Sum of Tree Products (STP), replacing the determinant and cofactors of the Nodal Admittance Matrix (NAM) of the circuit. To construct a transfer function, we start with a given active circuit and convert all its controlled sources and I/O-ports to nullors. Now, with a solid nullor circuit (passive elements and nullors) we first eliminate the passive elements through AM operations. This produces the STPs. Second, the all-nullor circuit is then used to find the signs or the STPs. Finally, the transfer function (in symbolic, if chosen) is obtained from the ratio between the STPs.

Feature evaluation and extraction based on neural network in analog circuit fault diagnosis

Choosing the right characteristic parameter is the key to fault diagnosis in analog circuit. The feature evaluation and extraction methods based on neural network are presented. Parameter evaluation of circuit features is realized by training results from neural network; the superior nonlinear mapping capability is competent for extracting fault features which are normalized and compressed subsequently. The complex classification problem on fault pattern recognition in analog circuit is transferred into feature processing stage by feature extraction based on neural network effectively, which improves the diagnosis efficiency. A fault diagnosis illustration validated this method.

Simulation realization of skip cycle mode integrated control circuit in the switching power supply with low standby loss

This paper explores and proposes a design solution of an integrated skip cycle mode （SCM） control circuit with a simple structure. The design is simulated and implemented with XD10H-1.0μm modular DIMOS 650 V process. In order to meet the requirement of a wide temperature range and high yields of products, the schematic extracted from the layout is simulated with five process corners at 27℃ and 90℃. Simulation results demonstrate that the proposed integrated circuit is immune to noise and achieves skipping cycle control when switching mode power supply （SMPS） works with low load or without load.

Data-driven fault diagnosis method for analog circuits based on robust competitive agglomeration

The data-driven fault diagnosis methods can improve the reliability of analog circuits by using the data generated from it. The data have some characteristics, such as randomness and incompleteness, which lead to the diagnostic results being sensitive to the specific values and random noise. This paper presents a data-driven fault diagnosis method for analog circuits based on the robust competitive agglomeration （RCA）, which can alleviate the incompleteness of the data by clustering with the competing process. And the robustness of the diagnostic results is enhanced by using the approach of robust statistics in RCA. A series of experiments are provided to demonstrate that RCA can classify the incomplete data with a high accuracy. The experimental results show that RCA is robust for the data needed to be classified as well as the parameters needed to be adjusted. The effectiveness of RCA in practical use is demonstrated by two analog circuits.

A Novel Crowbar Impulse Current Circuit for Testing the Switch-Type SPD

A crowbar impulse current circuit for testing the switch-type surge protective device （SPD） is presented. The crowbar circuit consists of a computer control circuit, a trigger voltage pulse generator, a main discharging switch, and a crowbar pseudospark switch. The active trigger technology was studied in the crowbar impulse current circuit. The circuit monitors the main discharging current and generates a trigger signal at a proper time for the crowbar pseudospark switch operation. The trigger characteristics of the main discharge switch and the crowbar pseu- dospark switch were investigated. By monitoring the preset applied capacitor voltage, the gap distance of the main discharging switch could be adjusted to ensure a discharging delay time less than 2 μs. Equipped with a surface ttashover trigger device made of high relative perimittivity dielectric material BaTiO3 （εr = 3460）, the discharge delay time of the crowbar pseudospark switch is less than 85 ns, and the minimum operating voltage is less than 1% of its self-breakdown voltage. With a storage capacitor of 9 μF , an inductor of 18 μH and a crowbar pseudospark switch, a load of 30 mΩ and an applied capacitor voltage of 40 kV, an impulse current waveform of maximum 25 kA was generated with a rise time and time to half peak value of 17.2 μs and 336μs respectively.

Wavelet neural network based fault diagnosis in nonlinear analog circuits

The theories of diagnosing nonlinear analog circuits by means of the transient response testing are studied. Wavelet analysis is made to extract the transient response signature of nonlinear circuits and compress the signature dada. The best wavelet function is selected based on the between-category total scatter of signature. The fault dictionary of nonlinear circuits is constructed based on improved back-propagation(BP) neural network. Experimental results demonstrate that the method proposed has high diagnostic sensitivity and fast fault identification and deducibility.

Modeling of the Earth’s Planetary Heat Balance with Electrical Circuit Analogy

The integral heat model for the system of the Earth’s surface—the atmosphere—the open space based on the electrical circuit analogy is presented. Mathematical models of the heat balance for this system are proposed. Heat circuit which is analog of the electrical circuit for investigating the temperature dependencies on the key parameters in the clear form is presented.

Combinatorial Optimization Based Analog Circuit Fault Diagnosis with Back Propagation Neural Network

Electronic components' reliability has become the key of the complex system mission execution. Analog circuit is an important part of electronic components. Its fault diagnosis is far more challenging than that of digital circuit. Simulations and applications have shown that the methods based on BP neural network are effective in analog circuit fault diagnosis. Aiming at the tolerance of analog circuit,a combinatorial optimization diagnosis scheme was proposed with back propagation( BP) neural network( BPNN).The main contributions of this scheme included two parts:( 1) the random tolerance samples were added into the nominal training samples to establish new training samples,which were used to train the BP neural network based diagnosis model;( 2) the initial weights of the BP neural network were optimized by genetic algorithm( GA) to avoid local minima,and the BP neural network was tuned with Levenberg-Marquardt algorithm( LMA) in the local solution space to look for the optimum solution or approximate optimal solutions. The experimental results show preliminarily that the scheme substantially improves the whole learning process approximation and generalization ability,and effectively promotes analog circuit fault diagnosis performance based on BPNN.

Improved RBF network application in analog circuit fault isolation

One kind of steepest descent incremental projection learning algorithm for improving the training of radial basis function(RBF)neural network is proposed,which is applied to analog circuit fault isolation.This algorithm simplified the structure of network through optimum output layer coefficient with incremental projection learning(IPL)algorithm,and adjusted the parameters of the neural activation function to control the network scale and improve the network approximation ability.Compared to the traditional algorithm,the improved algorithm has quicker convergence rate and higher isolation precision.Simulation results show that this improved RBF network has much better performance,which can be used in analog circuit fault isolation field.

DESIGN OF TERNARY CURRENT-MODE CMOS CIRCUITS BASED ON SWITCH-SIGNAL THEORY

By applying switch-signal theory, the interaction between MOS transmission switch-ing transistor and current signal in current-mode CMOS circuits is analyzed, and the theory oftransmission current-switches which is suitable to current-mode CMOS circuits is proposed. Thecircuits, such as ternary full-adder etc., designed by using this theory have simpler circuit struc-tures and correct logic functions. It is confirmed that this theory is efficient in guiding the logicdesign of current-mode CMOS circuits at switch level.

Robust Fault Diagnosis of Analog Circuits with Tolerances

A method for robust analog fault diagnosis using hybrid neural networks is proposed. The primary focus of the paper is to provide robust diagnosis using a mechanism to deal with the problem of element tolerances and reduce testing time. The proposed approach is based on the fault dictionary diagnosis method and backward propagation neural network (BPNN) and the adaptive resonance theory (ART) neural network. Simulation results show that the method is robust and fast for fault diagnosis of analog circuits with tolerances.

A novel circuit design for complementary resistive switch-based stateful logic operations

Recently, it has been demonstrated that memristors can be utilized as logic operations and memory elements. In this paper, we present a novel circuit design for complementary resistive switch（CRS）-based stateful logic operations. The proposed circuit can automatically write the destructive CRS cells back to the original states. In addition, the circuit can be used in massive passive crossbar arrays which can reduce sneak path current greatly. Moreover, the steps for CRS logic operations using our proposed circuit are reduced compared with previous circuit designs. We validate the effectiveness of our scheme through Hspice simulations on the logic circuits.

Analog circuit intelligent fault diagnosis based on GKPCA and multi-class SVM approach

Analog circuits fault diagnosis is essential for guaranteeing the reliability and maintainability of electronic systems. In this paper, a novel analog circuit fault diagnosis approach is proposed based on greedy kernel principal component analysis (KPCA) and one-against-all support vector machine (OAASVM). In order to obtain a successful SVM-based fault classifier, eliminating noise and extracting fault features are very important. Due to the better performance of nonlinear fault features extraction and noise elimination as compared with PCA, KPCA is adopted in the proposed approach. However, when we adopt KPCA to extract fault features of analog circuit, a drawback of KPCA is that the storage required for the kernel matrix grows quadratically, and the computational cost for eigenvector of the kernel matrix grows linearly with the number of training samples. Therefore, GKPCA, which can approximate KPCA with small representation error, is introduced to enhance computational efficiency. Based on the statistical learning theory and the empirical risk minimization principle, SVM has advantages of better classification accuracy and generalization performance. The extracted fault features are then used as the inputs of OAASVM to solve fault diagnosis problem. The effectiveness of the proposed approach is verified by the experimental results.

Change-over switch for quantum states transfer with topological channels in a circuit-QED lattice

We propose schemes to realize robust quantum states transfer between distant resonators using the topological edge states of a one-dimensional circuit quantum electrodynamics(QED)lattice.Analyses show that the distribution of edge states can be regulated accordingly with the on-site defects added on the resonators.And we can achieve different types of quantum state transfer without adjusting the number of lattices.Numerical simulations demonstrate that the on-site defects can be used as a change-over switch for high-fidelity single-qubit and two-qubit quantum states transfer.This work provides a viable prospect for flexible quantum state transfer in solid-state topological quantum system.

Challenging the Evolutionary Strategy for Synthesis of Analogue Computational Circuits

There are very few reports in the past on applications of Evolutionary Strategy (ES) towards the synthesis of analogue circuits. Moreover, even fewer reports are on the synthesis of computational circuits. Last fact is mainly due to the difficulty in designing of the complex nonlinear functions that these circuits perform. In this paper, the evolving power of the ES is challenged to design four computational circuits: cube root, cubing, square root and squaring functions. The synthesis succeeded due to the usage of oscillating length genotype strategy and the substructure reuse. The approach is characterized by its simplicity and represents one of the first attempts of application of ES towards the synthesis of “QR” circuits. The obtained experimental results significantly exceed the results published before in terms of the circuit quality, economy in components and computing resources utilized, revealing the great potential of the technique proposed to design large scale analog circuits.

Fault Diagnosis of Analog Circuit Based on PSO and BP Neural Network

In order to improve the speed and accuracy of analog circuit fault diagnosis,using Back Propagation Neural Network(BPNN),a new method is proposed based on Particle Swarm Optimization(PSO)to adjust weights of BP neural network.The model can not only overcome the limitations of the slow convergence and the local extreme values by basic BP algorithm,but also improve the learning ability and generalization ability with a higher precision.The response signals of analog circuit is preprocessed by Wavelet Packet Transform(WPT)as the fault feature.The simulation result shows that the proposed method has higher diagnostic accuracy and faster convergence speed,which is effective for fault location.

A Hybrid GA-SQP Algorithm for Analog Circuits Sizing

This study presents a hybrid algorithm obtained by combining a genetic algorithm (GA) with successive quadratic sequential programming (SQP), namely GA-SQP. GA is the main optimizer, whereas SQP is used to refine the results of GA, further improving the solution quality. The problem formulation is done in the framework named RUNE (fRamework for aUtomated aNalog dEsign), which targets solving nonlinear mono-objective and multi-objective optimization problems for analog circuits design. Two circuits are presented: a transimpedance amplifier (TIA) and an optical driver (Driver), which are both part of an Optical Network-on-Chip (ONoC). Furthermore, convergence characteristics and robustness of the proposed method have been explored through comparison with results obtained with SQP algorithm. The outcome is very encouraging and suggests that the hybrid proposed method is very efficient in solving analog design problems.