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0.18μm CMOS, MONOLITHIC MSTP ASIC
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作者 Wang Peng Jin Depeng Zeng Lieguang 《Journal of Electronics(China)》 2006年第6期948-951,共4页
A highly integrated monolithic Multi-Service Transport Platform (MSTP) Application Specified Integrated Circuit (AS1C) MSEOSX8-6 has been fabricated with 0.18μm CMOS technology incorporating 26×10^6 transist... A highly integrated monolithic Multi-Service Transport Platform (MSTP) Application Specified Integrated Circuit (AS1C) MSEOSX8-6 has been fabricated with 0.18μm CMOS technology incorporating 26×10^6 transistors. The chip is designed to provide standard framing and mapping of 10/100/1000Mbit/s Ethernet, Resilient Packet Ring (RPR) and E1 traffics into protected Synchronous Digital Hierarchy (SDH) STM-1 transport payloads using hitless rate adaptation for optimum bandwidth utilization. It consumes 4W of power on average and utilizes 756 pin enhanced BGA package. 展开更多
关键词 Multi-Service Transport Platform (MSTP) application specified Integrated Circuit (ASIC)
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