Trimmable bandgap reference circuit with exponential curvature compensation

This paper proposes an improved exponential curvature-compensated bandgap reference circuit to exploit the exponential relationship between the current gainβof the bipolar junction transistor(BJT)and the temperature as well as reduce the influence of resistance-temperature dependency.Considering the degraded circuit performance caused by the process deviation,the trimmable module of the temperature coefficient(TC)is introduced to improve the circuit stability.The circuit has the advantages of simple structure,high linear stability,high TC accuracy,and trimmable TC.It consumes an area of 0.09 mm^(2)when fabricated by using the 0.25-μm complementary metal-oxide-semiconductor(CMOS)process.The proposed circuit achieves the simulated power supply rejection(PSR)of about-78.7 dB@1 kHz,the measured TC of~4.7 ppm/℃over a wide temperature range from-55℃to 125℃with the 2.5-V single-supply voltage,and the tested line regulation of 0.10 mV/V.Such a high-performance bandgap reference circuit can be widely applied in high-precision and high-reliability electronic systems.

Curvature Compensated CMOS Bandgap Reference with Novel Process Variation Calibration Technique

A lowtemperature coefficient（ TC） bandgap reference（ BGR） with novel process variation calibration technique is proposed in this paper. This proposed calibration technique compensating both TC and output value of BGR achieves fine adjustment step towards the reference voltage,while keeping optimal TC by utilizing large resistance to help layout match. The high-order curvature compensation realized by poly and p-diffusion resistors is introduced into the design to guarantee the temperature characteristic. Implemented in 180 nm technology,the proposed BGR has been simulated to have a power supply rejection ratio（ PSRR） of 91 dB@100 Hz. The calibration technique covers output voltage scope of 0. 49 V-0. 56 Vwith TC of 9. 45 × 10^（-6）/℃-9. 56 × 10^（-6）/℃ over the temperature range of-40 ℃-120 ℃. The designed BGR provides a reference voltage of 500 mV,with measured TC of 10. 1 × 10^（-6）/℃.

A multiple transistor combination low-voltage curvature-corrected bandgap reference

A new bandgap reference（BGR） curvature compensation technology is proposed,which is a kind of multiple transistor combination.On the basis of the existing first-order bandgap reference technology,a compensation current circuit consisting of a sink current branch and a source current branch is added.The BGR was designed and simulated by using Semiconductor Manufacturing International Corporation（SMIC） 0.18μm CMOS process.The simulation results showed that when the power supply voltage was 1 V,the temperature coefficient of the BGR was 2.08 ppm/℃with the temperature range from—40 to 125℃,the power supply rejection ratio （PSRR） was—64.77 dB and the linear regulation was 0.44 mV/V with the supply power changing from 0.85 to 1.8 V.

Novel high PSRR high-order temperature-compensated subthreshold MOS bandgap reference

Novel high power supply rejection ratio （PSRR） high-order temperature-compensated subthreshold metal-oxidesemiconductor （MOS） bandgap reference （BGR） is proposed in Semiconductor Manufacturing International Corporation （SMIC） 0.13 gm complementary MOS （CMOS） process. By adopting subthreshold MOS field-effect transistors （MOSFETs） and the piecewise-curvature temperature-compensated technique, the output reference voltage＇s temperature performance of the subthreshold MOS BGR is effectively improved. The subthreshold MOS BGR achieves high PSRR performance by adopting the technique of pre-regulator. Simulation results show that the temperature coefficient （TC） of the subthreshold MOS BGR is 1.38× 10^-6/℃ when temperature is changed from -40 ℃ to 125 ℃ with a power supply voltage of 1.2 V. The subthreshold MOS BGR achieves the PSRR of - 104.54 dB, - 104.54 dB,- 104.5 dB, - 101.82 dB and - 79.92 dB at 10 Hz, 100 Hz, 1 kHz, 10 kHz and 100 kHz respectively.

A novel precision curvature-compensated bandgap reference

A high precision high-order curvature-compensated bandgap reference compatible with the standard CMOS process, which uses a compensation proportional to VTlnT realized by utilizing voltage to current converters and the voltage current characteristics of a base-emitter junction, is presented. Experiment results of the proposed bandgap reference implemented with the CSMC 0.5μm CMOS process demonstrate that a temperature coefficient of 3.9 ppm/℃ is realized at 3.6 V power supply, a power supply rejection ratio of 72 dB is achieved, and the line regulation is better than 0.304 mV/V dissipating a maximum supply current of 42 μA.

A 0.19 ppm/°C bandgap reference circuit with high-PSRR

A high-order curvature-compensated CMOS bandgap reference（BGR） topology with a low temperature coefficient（TC） over a wide temperature range and a high power supply reject ratio（PSRR） is presented.High-order correction is realized by incorporating a nonlinear current INL, which is generated by ？V_（GS） across resistor into current generated by a conventional first-order current-mode BGR circuit. In order to achieve a high PSRR over a broad frequency range, a voltage pre-regulating technique is applied. The circuit was implemented in CSMC 0.5 μm 600 V BCD process. The experimental results indicate that the proposed topology achieves TC of0.19 ppm/°C over the temperature range of 165 °C（-40 to 125 °C）, PSRR of-123 d B @ DC and-56 d B @ 100 k Hz. In addition, it achieves a line regulation performance of 0.017%/V in the supply range of 2.8–20 V.

Negative voltage bandgap reference with multilevel curvature compensation technique

A novel high-order curvature compensation negative voltage bandgap reference （NBGR） based on a novel multilevel compensation technique is introduced. Employing an exponential curvature compensation （ECC） term with many high order terms in itself, in a lower temperature range （TR） and a multilevel curvature compen- sation （MLCC） term in a higher TR, a flattened and better effect of curvature compensation over the TR of 165℃ （--40 to 125 ℃） is realised. The MLCC circuit adds two convex curves by using two sub-threshold operated NMOS. The proposed NBGR implemented in the Central Semiconductor Manufacturing Corporation （CSMC） 0.5 #m BCD technology demonstrates an accurate voltage of-1.183 V with a temperature coefficient （TC） as low as 2.45 ppm/℃over the TR of 165℃ at a -5.0 V power supply; the line regulation is 3 mV/V from a -5 to -2 V supply voltage. The active area of the presented NBGR is 370×180 μm2.

An offset-insensitive switched-capacitor bandgap reference with continuous output

An improved switched-capacitor bandgap reference with a continuous output voltage of 1.26 V has been implemented with Chartered 0.35-μm 5-V CMOS process. The output offset voltage, induced by non-ideal characteristics of operational amplifier and bias current generator, is suppressed by the proposed sample-and-hold circuit and self-bias technique. Experimental results show that the proposed circuit operates properly under a supply voltage varying from 3 to 5 V. The measured temperature coefficient is 112 ppm/℃ and the power supply rejection ratio of output voltage without any filtering capacitor is -40 dB and -33 dB at 100 Hz and 10 MHz, respectively.

A curvature calibrated bandgap reference with base-emitter current compensating in a 0.13μm CMOS process

In bandgap references,the effect caused by the input offset of the operational amplifier can be effectively reduced by the utilization of cascade bipolar junction transistors（BJTs）.But in modern CMOS logic processes,due to the small value ofβ,the base-emitter path of BJTs has a significant streaming effect on the collector current,which leads to a large temperature drift for the reference voltage.To solve this problem,a base-emitter current compensating technique is proposed in a cascade BJT bandgap reference structure to calibrate the curvature of the output voltage to temperature.Experimental results based on the 0.13μm logic CMOS process show that the reference voltage is 1.238 V and the temperature coefficient is 6.2 ppm/℃within the range of-40 to 125℃.

A low power bandgap reference with buffer working in the sub-threshold region for energy harvesting systems

We propose a bandgap reference, which works in sub-threshold regions to the reduce power consumption in applications such as those in energy harvesting systems that stimulate the development of power management for low power consumption applications.Measurements shows that the supply current of the proposed bandgap reference is only 6.87 μA, including a voltage buffer consuming 3.6 μA of supply current, when the supply voltage is 5 V.The supply voltage can vary from 3 to 11 V and the line regulation of the proposed bandgap reference output voltage is 0.875 mV/V at room temperature.The temperature coefficiency is 88.9 ppm from 10 to 100° C when the supply voltage is 5 V.

Low voltage bandgap reference with closed loop curvature compensation

A new low-voltage CMOS bandgap reference （BGR） that achieves high temperature stability is proposed. It feeds back the output voltage to the curvature compensation circuit that constitutes a closed loop circuit to cancel the logarithmic term of voltage VBE. Meanwhile a low voltage amplifier with the 0.5 μm low threshold technology is designed for the BGR. A high temperature stability BGR circuit is fabricated in the CSMC 0.5μm CMOS technology. The measured result shows that the BGR can operate down to 1 V, while the temperature coefficient and line regulation are only 9 ppm/℃ and 1.2 mV/V, respectively.

A high precision high PSRR bandgap reference with thermal hysteresis protection

To meet the accuracy requirement for the bandgap voltage reference by the increasing data conversion precision of integrated circuits,a high-order curvature-compensated bandgap voltage reference is presented employing the characteristic of bipolar transistor current gain exponentially changing with temperature variations.In addition,an over-temperature protection circuit with a thermal hysteresis function to prevent thermal oscillation is proposed.Based on the CSMC 0.5μm 20 V BCD process,the designed circuit is implemented;the active die area is 0.17×0.20 mm;. Simulation and testing results show that the temperature coefficient is 13.7 ppm/K with temperature ranging from -40 to 150℃,the power supply rejection ratio is -98.2 dB,the line regulation is 0.3 mV/V,and the power consumption is only 0.38 mW.The proposed bandgap voltage reference has good characteristics such as small area,low power consumption, good temperature stability,high power supply rejection ratio,as well as low line regulation.This circuit can effectively prevent thermal oscillation and is suitable for on-chip voltage reference in high precision analog,digital and mixed systems.

New Curvature-Compensated CMOS Bandgap Voltage Reference

A novel curvature-compensated CMOS bandgap voltage reference is presented. The reference utilizes two first order temperature compensations generated from the nonlinearity of the finite current gain β of vertical pnp bipolar transistor. The proposed circuit, designed in a standard 0.18 μm CMOS process, achieves a good temperature coefficient of 2.44 ppm/℃ with temperature range from --40℃ to 85 ℃, and about 4 mV supply voltage variation in the range from 1.4 V to 2.4 V. With a 1.8 V supply voltage, the power supply rejection ratio is -56dB at 10MHz.

A 2.2-V 2.9-ppm/℃BiCMOS bandgap voltage reference with full temperature-range curvature-compensation

A high precision high-order curvature-compensated bandgap reference compatible with the standard Bi-CMOS process,which uses a simple structure to realize a novel exponential curvature compensation in lower temperature ranges,and a piecewise curvature correction in higher temperature ranges,is presented.Experiment results of the proposed bandgap reference implemented with a 0.6-μm BCD process demonstrate that a temperature coefficient of 2.9 ppm/℃is realized at a 3.6-V power supply,a power supply rejection ratio of 85 dB is achieved,and the line regulation is better than 0.318 mV/V for 2.2-5 V supply voltage dissipating a maximum supply current of 45μA.The active area of the presented bandgap reference is 260×240μm;.

A high precision programmable bandgap voltage reference design for high resolution ADC

A programmable high precision bandgap reference is presented, which can meet the accuracy requirements for all technology corners while a traditional bandgap reference cannot.This design uses SMIC 0.18 μm 1P4M CMOS technology.The theoretically achievable temperature coefficient is close to 0.69 ppm/°C over the whole temperature range.

A sub-1 V high-precision CMOS bandgap voltage reference

A third-order,sub-1 V bandgap voltage reference design for low-power supply,high-precision applications is presented.This design uses a current-mode compensation technique and temperature-dependent resistor ratio to obtain high-order curvature compensation.The circuit was designed and fabricated by SMIC 0.18μm CMOS technology.It produces an output reference of 713.6 mV.The temperature coefficient is 3.235 ppm/℃in the temperature range of-40 to 120℃,with a line regulation of 0.199 mV/V when the supply voltage varies from 0.95 to 3 V.The average current consumption of the whole circuit is 49μA at the supply voltage of 1 V.

A Super Performance Bandgap Voltage Reference with Adjustable Output for DC-DC Converter

This paper presents a super performance bandgap voltage reference for DC-DC converter with adjustable output. it generates a wide range of voltage reference ranging from sub- 1V to 1,221 7 V and has a low temperature coefficient of 2.3 × 10 ^5/K over the temperature variation using the current feedback and resistive subdivision. In addition, the power supply rejection ration of the proposed bandgap voltage reference is 78 dB. When supply voltage varies from 2.5 V to 6 V, output VREF is 1,221 685±0.055 mV.

Novel high-PSRR high-order curvature-compensated bandgap voltage reference

This paper proposes a novel high-power supply rejection ratio（high-PSRR） high-order curvature-compensated CMOS bandgap voltage reference（BGR） in SMIC 0.18 μm CMOS process. Three kinds of current are added to a conventional BGR in order to improve the temperature drift within wider temperature range, which include a piecewise-curvaturecorrected current in high temperature range, a piecewise-curvature-corrected current in low temperature range and a proportional-to-absolute-temperature T^（1.5） current. The high-PSRR characteristic of the proposed BGR is achieved by adopting the technique of pre-regulator. Simulation results shows that the temperature coefficient of the proposed BGR with pre-regulator is 8.42x10^（-6）′ /℃ from - 55 ℃ to 125 ℃ with a 1.8 V power supply voltage. The proposed BGR with pre-regulator achieves PSRR of - 123.51 dB, - 123.52 dB, - 88.5 dB and - 50.23 dB at 1 Hz, 100 Hz, 100 kHz and 1 MHz respectively.

A low-voltage low-power CMOS voltage reference based on subthreshold MOSFETs

This paper describes a CMOS voltage reference using only resistors and transistors working in weak inversion,without the need for any bipolar transistors.The voltage reference is designed and fabricated by a 0.18μm CMOS process.The experimental results show that the proposed voltage reference has a temperature coefficient of 370 ppm/℃at a 0.8 V supply voltage over the temperature range of-35 to 85℃and a 0.1%variation in supply voltage from 0.8 to 3 V.Furthermore,the supply current is only 1.5μA at 0.8 V supply voltage.

A novel on-chip high to low voltage power conversion circuit

A novel power supply transform technique for high voltage IC based on the TSMC 0.6μm BCD process is achieved. An adjustable bandgap voltage reference is presented which is different from the traditional power supply transform technique. It can be used as an internal power supply for high voltage IC by using the push-pull output stage to enhance its load capability. High-order temperature compensated circuit is designed to ensure the precision of the reference. Only 0.01 mm^2 area is occupied using this novel power supply technique. Compared with traditional technique, 50% of the area is saved, 40% quiescent power loss is decreased, and the temperature coefficient of the reference is only 4.48 ppm/℃. Compared with the traditional LDO （low dropout） regulator, this power conversion architecture does not need external output capacitance and decreases the chip-pin and external components, so the PCB area and design cost are also decreased. The testing results show that this circuit works well.