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A Piecewise-Linear Compensated Bandgap Reference 被引量:5
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作者 王红义 来新泉 +1 位作者 李玉山 李先锐 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2004年第7期771-777,共7页
A bandgap voltage reference is presented with a piecewise linear compensating circuit in order to reduce the temperature coefficient.The basic principle is to divide the whole operating temperature range into some su... A bandgap voltage reference is presented with a piecewise linear compensating circuit in order to reduce the temperature coefficient.The basic principle is to divide the whole operating temperature range into some sub ranges.At different temperature sub ranges the bandgap reference can be compensated by different linear functions.Since the temperature sub range is much narrower than the whole range,the compensation error can be reduced significantly.Theoretically,the precision can be improved unlimitedly if the sub ranges are narrow enough.In the given example,with only three temperature sub ranges,the temperature coefficient of a conventional bandgap reference drops from 1 5×10 -5 /℃ to 2×10 -6 /℃ over the -40℃ to 120℃ temperature range. 展开更多
关键词 bandgap voltage reference piecewise linearly compensated curvature corrected temperature coefficient reference circuits
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A Novel CMOS Current Mode Bandgap Reference 被引量:8
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作者 幸新鹏 李冬梅 王志华 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2008年第7期1249-1253,共5页
A novel CMOS bandgap reference is presented. The output reference of this new current mode structure can be set to an arbitrary value above the bandgap voltage of silicon,avoiding offset in application. It also overco... A novel CMOS bandgap reference is presented. The output reference of this new current mode structure can be set to an arbitrary value above the bandgap voltage of silicon,avoiding offset in application. It also overcomes the systematic mismatch of conventional current mode bandgap references. The proposed bandgap reference has been implemented in UMC 0.18μm mixed mode technology. Under the supply voltage of 1.6V, the proposed bandgap reference provides an output reference of 1.45V and consumes 27μA of supply current. Using no curvature compensation,it can reach a temperature coefficient of 23ppm/℃ from 30 to 150℃ with a line regulation of 2. 1mV/V from 1.6 to 3V and a PSRR of 40dB at DC frequency. The chip area of the bandgap reference (without pad) is 0. 088mm^2. 展开更多
关键词 CMOS bandgap reference current mode
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A Near-1V 10ppm/℃ CMOS Bandgap Reference with Curvature Compensation 被引量:8
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作者 幸新鹏 李冬梅 王志华 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2008年第1期24-28,共5页
A low voltage bandgap reference with curvature compensation is presented. Using current mode structure, the proposed bandgap circuit has a minimum voltage of 900mV. Compensated through the VEB linearization technique,... A low voltage bandgap reference with curvature compensation is presented. Using current mode structure, the proposed bandgap circuit has a minimum voltage of 900mV. Compensated through the VEB linearization technique, this bandgap reference can reach a temperature coefficient of 10ppmFC from 0 to 150℃. With a 1.1V supply voltage,the supply current is 43μA and the PSRR is 55dB at DC frequency. This bandgap reference has been verified in a UMC 0.18μm mixed mode CMOS technology and occupies 0. 186mm^2 of chip area. 展开更多
关键词 CMOS bandgap reference low voltage curvature compensation
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A resistorless CMOS bandgap reference with below 1 V output
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作者 程剑平 朱卓娅 魏同立 《Journal of Southeast University(English Edition)》 EI CAS 2003年第4期317-319,共3页
This paper proposes a resistorless CMOS bandgap reference (BGR) circuit capable of generating a voltage less than 1V and presents a high performance start up circuit that can make the BGR circuit achieve the correct ... This paper proposes a resistorless CMOS bandgap reference (BGR) circuit capable of generating a voltage less than 1V and presents a high performance start up circuit that can make the BGR circuit achieve the correct operation point at power on. The simulation with Hspice was carried out using a 0 25 μm CMOS process. The results indicate that the proposed BGR circuit can operate on a 2 2 to 3 3 V power supply and its output voltage has a variation of 11 mV at -10 to 80 ℃. 展开更多
关键词 bandgap reference start up circuit CMOS low voltage
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Design of a Bandgap Reference with a Wide Supply Voltage Range 被引量:4
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作者 孙越明 赵梦恋 吴晓波 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2008年第8期1529-1534,共6页
An on-chip voltage reference with a wide supply voltage range is required by some applications,especially that of power management (PM) controller chips applied to telecommunication, automotive, lighting equipment, ... An on-chip voltage reference with a wide supply voltage range is required by some applications,especially that of power management (PM) controller chips applied to telecommunication, automotive, lighting equipment, etc., when high power supply voltage is needed. Accordingly,a new bandgap reference with a wide supply voltage range is proposed. Due to the improved structure,it features a high power supply rejection ratio (PSRR) and high temperature stability. In addition, an auxiliary micro-power reference is introduced to support the sleep mode of the PM chip and reduce its standby power consumption. The auxiliary reference provides bias currents in normal mode and a 1.28V reference voltage in sleep mode to replace the main reference and save power. Simulation results show that the reference provides a reference volt- age of 1.27V,which has a 3.5mV drift over the temperature range from -20 to 120~C and 56t^V deviation over a supply voltage range from 3 to 40V. The PSRR is higher than 100dB for frequency below 10kHz. The circuit was completed in 1.5tzm BCD (Bipolar-CMOS-DMOS) technology. The experimental results show that all main expectations are achieved. 展开更多
关键词 wide supply voltage range bandgap reference line regulation sleep mode micro power
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Bandgap Reference Design by Means of Multiple Point Curvature Compensation 被引量:6
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作者 姜韬 杨华中 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2007年第4期490-495,共6页
A new method,namely multiple point curvature compensation (MPCC),is proposed for the design of a bandgap reference,and its design principles, theoretical derivation, and one feasible circuitry implementation are pre... A new method,namely multiple point curvature compensation (MPCC),is proposed for the design of a bandgap reference,and its design principles, theoretical derivation, and one feasible circuitry implementation are presented. Being different from traditional techniques, this idea focuses on finding multiple temperatures in the whole range at which the first order derivatives of the output reference voltage equal zero. In this way, the curve of the output reference voltage is flattened and a better effect of curvature compensation is achieved. The circuitry is simulated in ST Microelectronics 0. 18μm CMOS technology, and the simulated result shows that the average temperature coefficient is only 1ppm/℃ in the range from - 40 to 125℃. 展开更多
关键词 bandgap reference curvature compensation sub-threshold circuit
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High-PSRR High-Order Curvature-Compensated CMOS Bandgap Voltage Reference 被引量:3
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作者 Qianneng Zhou Yunsong Li +3 位作者 Jinzhao Lin Hongjuan Li Yu Pang Wei Luo 《Journal of Harbin Institute of Technology(New Series)》 EI CAS 2015年第5期116-124,共9页
A high-PSRR high-order curvature-compensated CMOS bandgap voltage reference( BGR),which has the performances of high power supply rejection ratio( PSRR) and low temperature coefficient,is designed in SMIC 0. 18 μm CM... A high-PSRR high-order curvature-compensated CMOS bandgap voltage reference( BGR),which has the performances of high power supply rejection ratio( PSRR) and low temperature coefficient,is designed in SMIC 0. 18 μm CMOS process. Compared to the conventional curvature-compensated BGR which adopted a piecewise-linear current,the temperature characterize of the proposed BGR is effectively improved by adopting two kinds of current including a piecewise-linear current and a current proportional 1. 5 party to the absolute temperature T. By adopting a low dropout( LDO) regulator whose output voltage is the operating supply voltage of the proposed BGR core circuit instead of power supply voltage VDD,the proposed BGR with LDO regulator achieves a well PSRR performance than the BGR without LDO regulator. Simulation results show that the proposed BGR with LDO regulator achieves a temperature coefficient of 2. 1 × 10-6/ ℃ with a 1. 8 V power supply voltage and a line regulation of 4. 9 μV / V at 27 ℃. The proposed BGR with LDO regulator at 10 Hz,100 Hz,1 k Hz,10 k Hz and 100 k Hz have the PSRR of- 106. 388,- 106. 388,- 106. 38,- 105. 93 and-88. 67 d B respectively. 展开更多
关键词 bandgap voltage reference low DROPOUT REGULATOR temperature coefficient power supply REJECTION ratio
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Design of Bandgap Reference in Switching Power Supply 被引量:1
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作者 XU Li NIU Ping-juan FU Xian-song DING Ke PENG Xiao-lei 《Semiconductor Photonics and Technology》 CAS 2009年第2期101-104,129,共5页
A bandgap voltage reference is designed to meet the requirements of low power loss,low temperature coefficient and high power source rejection ratio(PSRR) in the intergrated circuit. Based on the analysis of conventio... A bandgap voltage reference is designed to meet the requirements of low power loss,low temperature coefficient and high power source rejection ratio(PSRR) in the intergrated circuit. Based on the analysis of conventional bandgap reference circuit,and combined with the integral performance of IC,the specific design index of the bandgap reference is put forward. In the meantime,the circuit and the layout are designed with Chartered 0.35 μm dual gate CMOS process. The simulation result shows that the coefficient is less than 30ppm/℃ with the temperature from -50 ℃ to 150 ℃. The bandgap reference has the characteristics of low power and high PSRR. 展开更多
关键词 CMOS bandgap reference low temperature coefficient PSRR
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Curvature Compensated CMOS Bandgap Reference with Novel Process Variation Calibration Technique 被引量:1
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作者 Jiancheng Zhang Mao Ye +1 位作者 Yiqiang Zhao Gongyuan Zhao 《Journal of Beijing Institute of Technology》 EI CAS 2018年第2期182-188,共7页
A lowtemperature coefficient( TC) bandgap reference( BGR) with novel process variation calibration technique is proposed in this paper. This proposed calibration technique compensating both TC and output value of ... A lowtemperature coefficient( TC) bandgap reference( BGR) with novel process variation calibration technique is proposed in this paper. This proposed calibration technique compensating both TC and output value of BGR achieves fine adjustment step towards the reference voltage,while keeping optimal TC by utilizing large resistance to help layout match. The high-order curvature compensation realized by poly and p-diffusion resistors is introduced into the design to guarantee the temperature characteristic. Implemented in 180 nm technology,the proposed BGR has been simulated to have a power supply rejection ratio( PSRR) of 91 dB@100 Hz. The calibration technique covers output voltage scope of 0. 49 V-0. 56 Vwith TC of 9. 45 × 10^(-6)/℃-9. 56 × 10^(-6)/℃ over the temperature range of-40 ℃-120 ℃. The designed BGR provides a reference voltage of 500 mV,with measured TC of 10. 1 × 10^(-6)/℃. 展开更多
关键词 bandgap reference voltage process variation resistance-trimming current-calibration curvature compensation temperature coefficient
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New Curvature-Compensated CMOS Bandgap Voltage Reference 被引量:4
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作者 Lu Shen Ning Ning Qi Yu Yan Luo Chun-Sheng Li 《Journal of Electronic Science and Technology of China》 2007年第4期370-373,共4页
A novel curvature-compensated CMOS bandgap voltage reference is presented. The reference utilizes two first order temperature compensations generated from the nonlinearity of the finite current gain β of vertical pnp... A novel curvature-compensated CMOS bandgap voltage reference is presented. The reference utilizes two first order temperature compensations generated from the nonlinearity of the finite current gain β of vertical pnp bipolar transistor. The proposed circuit, designed in a standard 0.18 μm CMOS process, achieves a good temperature coefficient of 2.44 ppm/℃ with temperature range from --40℃ to 85 ℃, and about 4 mV supply voltage variation in the range from 1.4 V to 2.4 V. With a 1.8 V supply voltage, the power supply rejection ratio is -56dB at 10MHz. 展开更多
关键词 bandgap voltage reference CMOS curvature-compensation technique finite current gain.
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Trimmable bandgap reference circuit with exponential curvature compensation
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作者 Hong-Zhuan Chen Fei Chu +3 位作者 Wen-Tao Lu Tie-Liang Zhang Wen-Chang Li Wei Gao 《Journal of Electronic Science and Technology》 EI CAS CSCD 2023年第3期52-62,共11页
This paper proposes an improved exponential curvature-compensated bandgap reference circuit to exploit the exponential relationship between the current gainβof the bipolar junction transistor(BJT)and the temperature ... This paper proposes an improved exponential curvature-compensated bandgap reference circuit to exploit the exponential relationship between the current gainβof the bipolar junction transistor(BJT)and the temperature as well as reduce the influence of resistance-temperature dependency.Considering the degraded circuit performance caused by the process deviation,the trimmable module of the temperature coefficient(TC)is introduced to improve the circuit stability.The circuit has the advantages of simple structure,high linear stability,high TC accuracy,and trimmable TC.It consumes an area of 0.09 mm^(2)when fabricated by using the 0.25-μm complementary metal-oxide-semiconductor(CMOS)process.The proposed circuit achieves the simulated power supply rejection(PSR)of about-78.7 dB@1 kHz,the measured TC of~4.7 ppm/℃over a wide temperature range from-55℃to 125℃with the 2.5-V single-supply voltage,and the tested line regulation of 0.10 mV/V.Such a high-performance bandgap reference circuit can be widely applied in high-precision and high-reliability electronic systems. 展开更多
关键词 bandgap reference Exponential curvature compensation Temperature coefficient(TC) Trimmable
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IC Implementation of a Programmable CMOS Voltage Reference 被引量:3
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作者 张科 郭健民 +1 位作者 孔明 李文宏 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2007年第1期36-41,共6页
A new approach for the design and implementation of a programmable voltage reference based on an improved current mode bandgap voltage reference is presented. The circuit is simulated and fabricated with Chartered 0.... A new approach for the design and implementation of a programmable voltage reference based on an improved current mode bandgap voltage reference is presented. The circuit is simulated and fabricated with Chartered 0. 35μm mixed-signal technology. Measurements demonstrate that the temperature coefficient is ± 36. 3ppm/℃ from 0 to 100℃ when the VID inputs are 11110.As the supply voltage is varied from 2.7 to 5V, the voltage reference varies by about 5mV. The maximum glitch of the transient response is about 20mV at 125kHz. Depending on the state of the five VID inputs,an output voltage between 1.1 and 1.85V is programmed in increments of 25mV. 展开更多
关键词 voltage regulation modules current mode bandgap voltage reference temperature coefficient power supply rejection ratio programmable voltage reference
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基于ASL1000的Bandgap Trim 设计及其算法研究 被引量:2
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作者 付贤松 马富民 +2 位作者 田会娟 杜桥 罗涛 《固体电子学研究与进展》 CAS 北大核心 2019年第1期54-58,76,共6页
在芯片生产过程中,由于工艺的影响,带隙基准电压V_(BG)会存在偏差。在芯片测试阶段,需要对V_(BG)进行trim修调,使其满足芯片参数要求。简要分析了带隙基准电压误差的来源,提出了一种E-Fuse修调电路,通过程序中的代码控制修调电阻的大小,... 在芯片生产过程中,由于工艺的影响,带隙基准电压V_(BG)会存在偏差。在芯片测试阶段,需要对V_(BG)进行trim修调,使其满足芯片参数要求。简要分析了带隙基准电压误差的来源,提出了一种E-Fuse修调电路,通过程序中的代码控制修调电阻的大小,使V_(BG)满足要求。同时,在该修调电路的基础上,采用了一种新型算法,使得测试芯片V_(BG)的时间缩短了近558 ms,减少了测试时间,降低了测试成本。 展开更多
关键词 带隙基准电压 E-Fuse 修调电路 算法
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模拟集成电路设计课程实验项目驱动式教学改革 被引量:2
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作者 刘海涛 唐枋 +2 位作者 林智 黄兴发 甘平 《实验室研究与探索》 CAS 北大核心 2024年第4期117-120,共4页
基于高校模拟集成电路设计课程实验项目分散且教学目标不明确,缺乏系统性和工程应用性,提出了项目驱动式教学改革。以与企业合作的工程项目为基础设立实验项目,并分解成由易及难的多个实验题目,分阶段、分步骤完成实验内容,最终完成模... 基于高校模拟集成电路设计课程实验项目分散且教学目标不明确,缺乏系统性和工程应用性,提出了项目驱动式教学改革。以与企业合作的工程项目为基础设立实验项目,并分解成由易及难的多个实验题目,分阶段、分步骤完成实验内容,最终完成模拟集成电路设计全流程实验,以“带隙基准电压源芯片全定制设计实验”为例阐述了实施步骤。课程实验项目采用驱动式教学加深了学生对课程内容的理解,有助于培养学生扎实的工程实践能力。 展开更多
关键词 模拟集成电路 课程实验 项目驱动式 带隙基准电压源 全定制设计
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一种低温漂低功耗的带隙基准电压源设计
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作者 张涛 刘逸冬 刘劲 《电子元件与材料》 CAS 北大核心 2024年第5期617-624,共8页
为了提高DC-DC转换器的性能,提出了一种电压带隙基准。通过调节参数抵消掉两路电流的一阶温度项,得到了只具有常数项和高阶温度项的电流,从而在输出电阻上转化为电压补偿三极管的高阶温度项,进而使得带隙具有较低的温度系数。之后在输... 为了提高DC-DC转换器的性能,提出了一种电压带隙基准。通过调节参数抵消掉两路电流的一阶温度项,得到了只具有常数项和高阶温度项的电流,从而在输出电阻上转化为电压补偿三极管的高阶温度项,进而使得带隙具有较低的温度系数。之后在输出端加上RC滤波器,使得高频段的电源抑制比得到提升。同时为了探索带隙在低功耗下的工作特性,几乎将所有MOS管置于亚阈值区,达到降低静态电流的效果。基于TSMC 0.18μm CMOS工艺完成了电路的设计与仿真,结果表明,在1.8 V的电源电压下,带隙输出为1.256 V;在-40~140℃的变化范围内,温度系数为6.3×10^(-6)℃^(-1);通过增加RC滤波器,高频电源抑制比为-65 dB@10 MHz;而且整个带隙的静态电流仅有6.2μA。 展开更多
关键词 带隙基准 温度补偿 亚阈值 温度系数
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一种高PSRR低温漂无运放带隙基准
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作者 王凯 张方晖 +2 位作者 杨旭 王义晨 李梓腾 《现代电子技术》 北大核心 2024年第23期171-175,共5页
针对无运放带隙基准电压源温度特性及电源抑制比差的问题,设计一种高电源抑制比、低温漂的无运放带隙基准电路。该电路通过电流镜进行钳位,避免运算放大器失调电压对输出基准的影响,利用晶体管栅极与三极管基极生成稳定的补偿电流,以降... 针对无运放带隙基准电压源温度特性及电源抑制比差的问题,设计一种高电源抑制比、低温漂的无运放带隙基准电路。该电路通过电流镜进行钳位,避免运算放大器失调电压对输出基准的影响,利用晶体管栅极与三极管基极生成稳定的补偿电流,以降低基准电压的高阶温度系数,输出端采用共源共栅结构提高电源抑制比。基于SMIC 0.18μm BCD工艺在Cadence环境下对电路进行仿真,仿真结果表明:在-40~125℃范围内,电路的温度系数为3.187×10^(-6)/℃,10 Hz时电源抑制比为-88.6 dB,1 MHz时电源抑制比为-50.2 dB。在考虑启动电路影响的情况下,电路在5 V电源下的静态电流为3.78μA,带隙基准的版图面积为160μm×183μm。可实现对基准电压高阶温度项的补偿,降低温度系数,并在没有滤波电容的条件下提高带隙基准的PSRR。 展开更多
关键词 带隙基准 无运放 电源抑制比 温度系数 补偿电流 启动电路
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一种新型带曲率补偿的带隙基准
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作者 李新 高梦真 杨森林 《电子元件与材料》 CAS 北大核心 2024年第7期878-883,共6页
针对传统带隙基准存在温度漂移大以及电源抑制比低的问题,提出了一种新型的带曲率补偿的带隙基准电压源。采用基极电流补偿以及曲率补偿技术对传统带隙基准结构进行改进。设计了低失配改进电路、低温漂改进以及启动电路等。利用共源共... 针对传统带隙基准存在温度漂移大以及电源抑制比低的问题,提出了一种新型的带曲率补偿的带隙基准电压源。采用基极电流补偿以及曲率补偿技术对传统带隙基准结构进行改进。设计了低失配改进电路、低温漂改进以及启动电路等。利用共源共栅电流镜技术和负反馈网络保证带隙基准输出电压,极大程度降低了运放失调电压对带隙基准电压的干扰,实现了低温漂特性。基于东部高科0.18μm BCD工艺,在Cadence Spectre下进行仿真。仿真结果表明:该带隙基准电路在-40~150℃温度范围内,输入电压为5 V,输出电压稳定在1.192 V;温度系数为4.84×10^(-6)/℃;在低频时电源抑制比为-78 dB。 展开更多
关键词 带隙基准 基极电流补偿 曲率补偿 低温度系数 电源抑制比
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A Piecewise Curvature-Corrected CMOS Bandgap Reference with Negative Feedback
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作者 李景虎 王永生 +1 位作者 喻明艳 叶以正 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2008年第10期1974-1979,共6页
A piecewise curvature-corrected bandgap reference (BGR) with negative feedback is proposed. It features employing a temperature-dependent resistor ratio technique to get a piecewise corrected current, which corrects... A piecewise curvature-corrected bandgap reference (BGR) with negative feedback is proposed. It features employing a temperature-dependent resistor ratio technique to get a piecewise corrected current, which corrects the nonlinear temperature dependence of the first-order BGR. The piecewise corrected current generator also forms negative feedback to improve the line regulation and power supply rejection (PSR). Measurement results show the proposed BGR achieves a maximum temperature coefficient (TC) of 21.2ppm/℃ without trimming in the temperature range of - 50-125℃ and a PSR of - 60dB at 2.6V supply voltage. The line regulation is 0.8mV/V in the supply range of 2.6-5.6V. It is successfully implemented in an SMIC 0.35μm 5V n-well digital CMOS process with the effective chip area of 0.04mm^2 and power con- sumption of 0.18mW. The reference is applied in a 3,5V optical receiver trans-impedance amplifier. 展开更多
关键词 piecewise curvature-corrected bandgap reference line regulation PSR temperature coefficient
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一种采用分段温度补偿的低温漂带隙基准源 被引量:1
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作者 席银征 李楠 刁节涛 《微电子学与计算机》 2024年第1期118-125,共8页
提出了一款宽温度范围、低温漂系数的带隙基准源。以Banba结构的带隙基准源作为核心电路,产生开口向下的抛物线状输出基准电压,将抛物线顶点向高温段移动,使输出基准电压的高温段趋于平缓,利用分段温度补偿技术对低温段进行曲率补偿,补... 提出了一款宽温度范围、低温漂系数的带隙基准源。以Banba结构的带隙基准源作为核心电路,产生开口向下的抛物线状输出基准电压,将抛物线顶点向高温段移动,使输出基准电压的高温段趋于平缓,利用分段温度补偿技术对低温段进行曲率补偿,补偿电流由不同温度系数的电流相减产生,有效降低了温漂系数,并拓宽了带隙基准源工作的温度范围。在0.18μm的标准互补金属氧化物半导体(CMOS)工艺下进行电路性能验证,仿真结果表明,在-50~150℃的温度范围内,提出的带隙基准源的温漂系数为0.65 ppm/℃,在1.8 V的电源电压下输出电压为760 mV,版图面积仅为0.01 mm^(2)。 展开更多
关键词 带隙基准源 分段温度补偿 温漂系数 宽温度范围 互补金属氧化物半导体(CMOS)
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基于带隙基准的改进型像元共享CTIA红外读出电路设计
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作者 王坤 关晓宁 +5 位作者 康智博 张凡 张焱超 邓旭光 周峰 芦鹏飞 《激光技术》 CAS CSCD 北大核心 2024年第6期816-821,共6页
为了提高红外读出电路动态范围、增强红外成像质量,加入暗电流抑制模块电路,设计了一种四像元分时共享的电容反馈跨阻放大器(CTIA)和带隙基准源相互配合的高性能红外读出电路。通过带隙基准源产生两个基准电压586 mV和293 mV,其中293 m... 为了提高红外读出电路动态范围、增强红外成像质量,加入暗电流抑制模块电路,设计了一种四像元分时共享的电容反馈跨阻放大器(CTIA)和带隙基准源相互配合的高性能红外读出电路。通过带隙基准源产生两个基准电压586 mV和293 mV,其中293 mV基准电压值的温漂系数达到1.49×10-6/℃,可对分流管的栅极和源极提供稳定的电压偏置,实现对暗电流的精准撇除。结果表明,该电路可实现电流信号从10 pA~10 nA宽动态范围的积分电压读出,读出数据通过线性拟合,拟合优度R 2达到0.9992,说明电路性能良好。此研究未来可应用到线列和面阵的红外探测器中。 展开更多
关键词 探测器 读出电路 暗电流抑制 像元共享 带隙基准
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