In recent years,as China has finished the updating of the fourth generation of network,for guaranteeing the information security of the state,communication chip with complete independent intellectual property right mu...In recent years,as China has finished the updating of the fourth generation of network,for guaranteeing the information security of the state,communication chip with complete independent intellectual property right must be possessed to support the advancement of such project.TD-LTE Baseband Chip is a super-large-scale integrated circuit designed basing on SOC,which needs to carry out coding,etc to the transmitted baseband signal,or carry out decoding,etc to the received baseband signal.LPDDR2 SDRAM is used in the chip design process due to its low power dissipation,high capacity and high reliability.As PHY in the controller architecture of LPDDR2 SDRAM adopts hard core design,it cannot be achieved in Virtex-7 2000T prototype verification platform.This design mainly builds on such prototype verification platform to propose the verification scheme of LPDDR2 SDRAM controller in TD_LTE baseband chip,so as to guarantee that prototype verification in FPGA can be carried out by TD_LTE baseband system,and meanwhile high capacity storage space can be provided to the system.展开更多
The paper proposes a low power non-volatile baseband processor with wake-up identification(WUI) receiver for LR-WPAN transceiver.It consists of WUI receiver,main receiver,transmitter,non-volatile memory(NVM) and power...The paper proposes a low power non-volatile baseband processor with wake-up identification(WUI) receiver for LR-WPAN transceiver.It consists of WUI receiver,main receiver,transmitter,non-volatile memory(NVM) and power management module.The main receiver adopts a unified simplified synchronization method and channel codec with proactive Reed-Solomon Bypass technique,which increases the robustness and energy efficiency of receiver.The WUI receiver specifies the communication node and wakes up the transceiver to reduce average power consumption of the transceiver.The embedded NVM can backup/restore the states information of processor that avoids the loss of the state information caused by power failure and reduces the unnecessary power of repetitive computation when the processor is waked up from power down mode.The baseband processor is designed and verified on a FPGA board.The simulated power consumption of processor is 5.1uW for transmitting and 28.2μW for receiving.The WUI receiver technique reduces the average power consumption of transceiver remarkably.If the transceiver operates 30 seconds in every 15 minutes,the average power consumption of the transceiver can be reduced by two orders of magnitude.The NVM avoids the loss of the state information caused by power failure and energy waste caused by repetitive computation.展开更多
基金National Science and Technology Major Project of Ministry of Industry and Information Technology in 2011(2011ZX03003-003-02)
文摘In recent years,as China has finished the updating of the fourth generation of network,for guaranteeing the information security of the state,communication chip with complete independent intellectual property right must be possessed to support the advancement of such project.TD-LTE Baseband Chip is a super-large-scale integrated circuit designed basing on SOC,which needs to carry out coding,etc to the transmitted baseband signal,or carry out decoding,etc to the received baseband signal.LPDDR2 SDRAM is used in the chip design process due to its low power dissipation,high capacity and high reliability.As PHY in the controller architecture of LPDDR2 SDRAM adopts hard core design,it cannot be achieved in Virtex-7 2000T prototype verification platform.This design mainly builds on such prototype verification platform to propose the verification scheme of LPDDR2 SDRAM controller in TD_LTE baseband chip,so as to guarantee that prototype verification in FPGA can be carried out by TD_LTE baseband system,and meanwhile high capacity storage space can be provided to the system.
基金supported in part by the National Natural Science Foundation of China(No.61306027)
文摘The paper proposes a low power non-volatile baseband processor with wake-up identification(WUI) receiver for LR-WPAN transceiver.It consists of WUI receiver,main receiver,transmitter,non-volatile memory(NVM) and power management module.The main receiver adopts a unified simplified synchronization method and channel codec with proactive Reed-Solomon Bypass technique,which increases the robustness and energy efficiency of receiver.The WUI receiver specifies the communication node and wakes up the transceiver to reduce average power consumption of the transceiver.The embedded NVM can backup/restore the states information of processor that avoids the loss of the state information caused by power failure and reduces the unnecessary power of repetitive computation when the processor is waked up from power down mode.The baseband processor is designed and verified on a FPGA board.The simulated power consumption of processor is 5.1uW for transmitting and 28.2μW for receiving.The WUI receiver technique reduces the average power consumption of transceiver remarkably.If the transceiver operates 30 seconds in every 15 minutes,the average power consumption of the transceiver can be reduced by two orders of magnitude.The NVM avoids the loss of the state information caused by power failure and energy waste caused by repetitive computation.
