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Multiplier Design Utilizing Tri Valued Logic for RLNS Based DSP Applications
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作者 Shalini Radakirishnan Valliammal Sampath Palaniswami 《Circuits and Systems》 2016年第4期417-433,共17页
Residue Number System (RNS) has proved shaping the Digital Signal Processing (DSP) units into highly parallel, faster and secured entities. The computational complexity of the multiplication process for a RNS based de... Residue Number System (RNS) has proved shaping the Digital Signal Processing (DSP) units into highly parallel, faster and secured entities. The computational complexity of the multiplication process for a RNS based design can be reduced by indulging Logarithmic Number System (LNS). The combination of these unusual number systems forms Residue Logarithmic Number System (RLNS) that provides simple internal architectures. Till date RLNS based processing units are designed for binary logic based circuits. In order to reduce the number of input output signals in a system, the concept of Multiple Valued Logic (MVL) is introduced in literature. In that course of research, this paper uses Tri Valued Logic (TVL) in RLNS technique proposed, to further reduce the chip area and delay value. Thus in this research work three different concepts are proposed, it includes the design of multiplier for RLNS based application for number of bits 8, 16 and 32. Next is the utilization of TVL in the proposed multiplication structure for RLNS based system along with the error correction circuits for the ternary logarithmic and antilogarithmic conversion process. Finally the comparison of the two multiplication schemes with the existing research of multiplier design for RNS based system using booth encoding concepts. It can be found that the proposed technique using TVL saves on an average of about 63% of area occupied and 97% of delay value respectively than the existing technique. 展开更多
关键词 Residue Number system (RNS) Residue Logarithmic Number system (RLNS) Tri Valued logic (TVL) binary logic Error Correction Circuits
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A quality status encoding scheme for PCB-based products in IoT-enabled remanufacturing 被引量:1
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作者 Sijie LI You SHANG 《Frontiers of Computer Science》 SCIE EI CSCD 2021年第5期173-186,共14页
In this paper,a binary-extensible quality status encoding scheme,named IQSCT(IoT quality status code table),is proposed for the PCB-based product with available recovery options in remanufacturing.IQSCT is achieved by... In this paper,a binary-extensible quality status encoding scheme,named IQSCT(IoT quality status code table),is proposed for the PCB-based product with available recovery options in remanufacturing.IQSCT is achieved by code evolution based on binary logic,in which the product flow and the quality information flow are integrated,and three key features of PCB-based product(PCB-module association,assembly-disassembly logic,and disassembly risk)are involved in production costing.With IQSCT,the manufacturer can have better decisions to reduce remanufacturing cost and improve resource utilization,which is verified by a case study based on the real data from BOM cost and corresponding estimation of Apple iPhone 11 series. 展开更多
关键词 Intemet-of-Things binary encoding scheme binary logic bit operations PCB-based products REMANUFACTURING recovery option
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