10 Gbit/s PRBS tester implemented in FPGA

The design of an FPGA（ field programmable gate array） based programmable SONET （synchronous optical network） OC-192 10 Gbit/s PRBS （pseudo-random binary sequence） generator and a bit interleaved polarity 8 （BIP-8） error detector is presented. Implemented in a parallel feedback configuration, this tester features PRBS generation of sequences with bit lengths of 2^7 - 1,2^10- 1,2^15 - 1,2^23 - land 2^31 - 1 for up to 10 Gbit/s applications with a 10 Gbit/s optical transceiver, via the SFI-4 （OC-192 serdes-framer interface）. In the OC-192 frame alignment circuit, a dichotomy search algorithm logic which performs the functions of word alignment and STM-64/OC192 de-frame speeds up the frame sync logic and reduces circuit complexity greatly. The system can be used as a low cost tester to evaluate the performance of OC-192 devices and components, taking the replacement of precious commercial PRBS testers.

HY-PC:Enabling Consistent Positioning and Communication Using Visible Light

Visible light(VL)plays an important role in achieving high-precision positioning and low bit error radio(BER)data communication.However,most VL-based systems can not achieve positioning and communication,simultaneously.There are two problems:1)the hybrid systems are difficult to extract distinguishable positioning beacon features without affecting communication performance,2)in the hybrid systems,the lost data bits in the inter-frame gap(IFG)are hard to recover,which affects positioning and communication performance.Therefore,in this article,we propose a novel VL-based hybrid positioning and communication system,named HY-PC system,to solve the above problems.First,we propose the robust T-W mapping for recognizing specific Light Emitting Diodes(LEDs),which can provide stable LED recognition accuracy without adding extra beacon data and does not decrease the communication rate.Furthermore,we also propose the novel linear block coding and bit interleaving mechanism,which can recover the lost data bits in the IFG and improve data communication performance.Finally,we use commercial off-the-shelf devices to implement our HY-PC system,extensive experimental results show that our HY-PC system can achieve consistent high-precision positioning and low-BER data communication,simultaneously.

Study on the Optimized Demodulation and Decoding of the BICM-ID system coded with LDPC

The demodulation and decoding solution commonly used in the bit interleaving code modulation and the LDPC coded demodulation and decoding system of the iterative decoding （BICM-ID） is to report the soft information output from the decoder of the receiver to the demodulator as priori information for completing the decoding. However, this will give rise to the reduction of the minimum Euclidean distances between codes, so that the performances of the system decline under non-fading Gaussian channel. According to this problem, an optimized iterative demodulation decoding solution is proposed and also is analyzed using simulation. The result shows that this solution can improve the demodulation and decoding performances of LDPC coded modulation and demodulation system.

PERFORMANCE EVALUATION OF LOW DENSITY PARITY CHECK CODES FOR DIGITAL RADIO MONDIALE (DRM) SYSTEM

In Digital Radio Mondiale （DRM） system, achieving good audio quality becomes a challenge due to its limited band-width of 9 or 10kHz and the very bad lading channels. Therefore, DRM needs highly efficient channel coding schemes. This paper, proposes the schemes which use the Low-Density Parity-Check （LDPC） coded Bit-Interleaved Coded Modulation （BICM） schemes for the implementation of DRM systems. Simulation results show that the proposed system is more efficient than the Rate Compatible Punctured Convolutional （RCPC） coded DRM system on various broadcast channels, and may be recommended as a coding technology for Digital Amplitude Modulation Broadcasting （DAMB） systems of China.

A New Approximation to the Jacobian Logarithm Suitable for MAP Decoding in BICM-ID

In this paper, a new method to approximate the compensation term in the Jacobian logarithm used by the MAP decoder is proposed. Using the proposed approximation, the complex functions In（.） and exp（.） in the Exact-log-MAP algorithm can be estimated with high accuracy and lower computational complexity. The efficacy of the proposed approximation is investigated and demonstrated by applying it to iteratively decoded BICM （Bit Interleaved Coded Modulation）.

Simplified MMSE Detectors for Turbo Receiver in BICM MIMO Systems

In this article, two methods adopting simplified minimum mean square error （MMSE） filter with soft parallel interference cancellation （SPIC） are discussed for turbo receivers in bit interleaved coded modulation （BICM） multiple-input multiple-output （MIMO） systems. The proposed methods are utilized in the non-first iterative process of turbo receiver to suppress residual interference and noise. By modeling the components of residual interference after SPIC plus the noise as uncorrelated Gaussian random variables, the matrix inverse for weighting vector of conventional MMSE becomes unnecessary. Thus the complexity can be greatly reduced with only slight performance deterioration. By introducing optimal ordering to SPIC, performance gap between simplified MMSE and conventional MMSE further narrows. Monte Carlo simulation results confirm that the proposed algorithms can achieve almost the same performance as the conventional MMSE SPIC in various MIMO configurations, but with much lower computational complexity.