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Low-Complexity Bit-Parallel Multiplier over GF(2^m) Using Dual Basis Representation
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作者 李秋莹 洪振雄 周义昌 《Journal of Computer Science & Technology》 SCIE EI CSCD 2006年第6期887-892,共6页
Recently, cryptographic applications based on finite fields have attracted much attention. The most demanding finite field arithmetic operation is multiplication. This investigation proposes a new multiplication algor... Recently, cryptographic applications based on finite fields have attracted much attention. The most demanding finite field arithmetic operation is multiplication. This investigation proposes a new multiplication algorithm over GF(2^m) using the dual basis representation. Based on the proposed algorithm, a parallel-in parallel-out systolic multiplier is presented, The architecture is optimized in order to minimize the silicon covered area (transistor count). The experimental results reveal that the proposed bit-parallel multiplier saves about 65% space complexity and 33% time complexity as compared to the traditional multipliers for a general polynomial and dual basis of GF(2^m). 展开更多
关键词 bit-parallel systolic multiplier inner product dual basis galois field gf(2^m)
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