Charge sharing is becoming an important topic as the feature size scales down in fin field-effect-transistor （FinFET） technology. However, the studies of charge sharing induced single-event transient （SET） pulse q...Charge sharing is becoming an important topic as the feature size scales down in fin field-effect-transistor （FinFET） technology. However, the studies of charge sharing induced single-event transient （SET） pulse quenching with bulk FinFET are reported seldomly. Using three-dimensional technology computer aided design （3DTCAD） mixed-mode simulations, the effects of supply voltage and body-biasing on SET pulse quenching are investigated for the first time in bulk FinFET process. Research results indicate that due to an enhanced charge sharing effect, the propagating SET pulse width decreases with reducing supply voltage. Moreover, compared with reverse body-biasing （RBB）, the circuit with forward body-biasing （FBB） is vulnerable to charge sharing and can effectively mitigate the propagating SET pulse width up to 53% at least. This can provide guidance for radiation-hardened bulk FinFET technology especially in low power and high performance applications.展开更多
As the device size decreases, the soft error induced by space ions is becoming a great concern for the reliability of integrated circuits（ICs）. At present, the body biasing technique is widely used in highly scaled ...As the device size decreases, the soft error induced by space ions is becoming a great concern for the reliability of integrated circuits（ICs）. At present, the body biasing technique is widely used in highly scaled technologies. In the paper, using the three-dimensional technology computer-aided design（TCAD） simulation, we analyze the effect of the body biasing on the single-event charge collection in deep N-well technology. Our simulation results show that the body biasing mainly affects the behavior of the source, and the effect of body biasing on the charge collection for the nMOSFET and pMOSFET is quite different. For the nMOSFET, the RBB will increase the charge collection, while the FBB will reduce the charge collection. For the pMOSFET, the effect of RBB on the SET pulse width is small, while the FBB has an adverse effect. Moreover, the differenceof the effect of body biasing on the charge collection is compared in deep N-well and twin well.展开更多
In this article,the body bias dependence of the bias temperature instability(BTI)in bulk FinFETs is experimentally studied,under different test conditions for the first time.In contrast to the traditional understandin...In this article,the body bias dependence of the bias temperature instability(BTI)in bulk FinFETs is experimentally studied,under different test conditions for the first time.In contrast to the traditional understanding that changing body bias has little impact on BTI degradation in FinFETs due to its weak body effect,it is observed that it actually has non-negligible impacts.And a forward body bias(FBB)can reduce the BTI degradation in FinFETs,which is opposite with the trend in planar devices.The underlying physics is found due to the trade-off between two competing factors.The results are helpful for understanding and modeling reliability in FinFETs.展开更多
This paper presents research on a low power CMOS UWB LNA based on a cascoded common source and current-reused topology. A systematic approach for the design procedure from narrow band to UWB is developed and discussed...This paper presents research on a low power CMOS UWB LNA based on a cascoded common source and current-reused topology. A systematic approach for the design procedure from narrow band to UWB is developed and discussed in detail. The power reduction can be achieved by using body biased technique and current-reused topology. The optimum width of the major transistor device M1 is determined by the power-constraint noise optimization with inner parasitic capacitance between the gate and source terminal. The derivation of the signal amplification S21 by high frequency small signal model is displayed in the paper. The optimum design of the complete circuit was studied in a step by step analysis. The measurements results show that the proposed circuit has superior S11, gain, noise figure, and power consumption. From the measured results, S11 is lower than -12 dB, S22 is lower than -10 dB and forward gain S21 has an average value with 12 dB. The noise figure is from 4 to 5.7 dB within the whole band. The total power consumption of the proposed circuit including the output buffer is 4.6 mW with a supply voltage of 1 V. This work is implemented in a standard TSMC 0.18 μm CMOS process technology.展开更多
Objectives:Prevalence rates of overweight and obesity are dramatically ever-increasing across the world.Therefore,this study was to evaluate the effect of mindfulness-based cognitive therapy(MBCT)on weight loss,hypert...Objectives:Prevalence rates of overweight and obesity are dramatically ever-increasing across the world.Therefore,this study was to evaluate the effect of mindfulness-based cognitive therapy(MBCT)on weight loss,hypertension,and attentional bias towards food cues in a group of women affected with this condition.Methods:A total of 45 participants were selected out of women referring to the Nutrition and Diet Therapy Clinic affiliated to Shahid Beheshti University of Medical Sciences,Iran,and then randomized into three groups of 15.The first experimental group was subjected to an energy-restricted diet therapy together with MBCT during 8 sessions,the second group took the diet therapy alone,and the third group received no intervention.Body mass index(BMI),hypertension,and attentional bias towards food cues were correspondingly evaluated before,at the end,and four weeks after the completion of the interventions.Results:The results of this study revealed that MBCT,along with diet therapy,had been significantly more effective in weight loss,decrease in BMI,lower systolic blood pressure(SBP),and attentional bias towards food cues compared with the diet therapy alone(P≤0.01).MBCT had no significant impact on the decline in diastolic blood pressure(DBP)in participants in the follow-up phase.Conclusion:This study demonstrated that MBCT along with the conventional diet therapy was more effective in weight loss,decrease in BMI,hypertension control,as well as attentional bias towards food cues than the diet therapy alone.展开更多
The effects of back gate bias(BGEs) on radio-frequency(RF) performances in PD SOI n MOSFETs are presented in this paper. Floating body(FB) device, T-gate body-contact(TB) device, and tunnel diode body-contact(TDBC) de...The effects of back gate bias(BGEs) on radio-frequency(RF) performances in PD SOI n MOSFETs are presented in this paper. Floating body(FB) device, T-gate body-contact(TB) device, and tunnel diode body-contact(TDBC) device, of which the supply voltages are all 1.2 V, are compared under different back gate biases by different figures of merit, such as cut-off frequency( fT), maximum frequency of oscillation( fmax), etc. Because of the lack of a back gate conducting channel, the drain conductance(gd) of TDBC transistor shows a smaller degradation than those of the others, and the trans-conductance(gm) of TDBC is almost independent of back gate bias. The values of fT of TDBC are also kept nearly constant under different back gate biases. However, RF performances of FB and TB each show a significant degradation when the back gate bias is larger than ～ 20 V. The results indicate that TDBC structures could effectively improve the back gate bias in RF performance.展开更多
The hysteresis effect in the output characteristics,originating from the floating body effect,has been measured in partially depleted（PD） silicon-on-insulator（SOI） MOSFETs at different back-gate biases.I D hystere...The hysteresis effect in the output characteristics,originating from the floating body effect,has been measured in partially depleted（PD） silicon-on-insulator（SOI） MOSFETs at different back-gate biases.I D hysteresis has been developed to clarify the hysteresis characteristics.The fabricated devices show the positive and negative peaks in the I D hysteresis.The experimental results show that the I D hysteresis is sensitive to the back gate bias in 0.13-渭m PD SOI MOSFETs and does not vary monotonously with the back-gate bias.Based on the steady-state Shockley-Read-Hall（SRH） recombination theory,we have successfully interpreted the impact of the back-gate bias on the hysteresis effect in PD SOI MOSFETs.展开更多
随着工艺技术的缩减,功耗问题日益严重,低功耗优化技术成了当前研究的一大重点.对处理器的功耗优化可以从设计过程、运行过程和空闲状态来考虑.本文重点研究了处理器在运行时的功率管理技术,即动态功率管理技术.它主要包括动态电压缩减D...随着工艺技术的缩减,功耗问题日益严重,低功耗优化技术成了当前研究的一大重点.对处理器的功耗优化可以从设计过程、运行过程和空闲状态来考虑.本文重点研究了处理器在运行时的功率管理技术,即动态功率管理技术.它主要包括动态电压缩减DVS(Dynamic Voltage Scaling)和动态阈值电压缩减DVTS(Dynamic VTH Scaling)的方法,其中DVTS又是通过对衬底偏压的调整来实现阈值电压的调制的.本文重点研究了这两种技术的原理和实现结构,并分析了它们目前的研究和应用。展开更多
A modified four transistor （4T） self-body-bias structured SRAM/SOI memory cell is proposed. The structure is designed and its parameters are obtained by performance simulation and analysis with TSUPREM4 and MEDICI.T...A modified four transistor （4T） self-body-bias structured SRAM/SOI memory cell is proposed. The structure is designed and its parameters are obtained by performance simulation and analysis with TSUPREM4 and MEDICI.The structure saves area and its process is simplified by using the body resistor with buried p^＋ channel beneath the nMOS gate instead of the pMOS of 6T CMOS SRAM. Furthermore, this structure can operate safely with a 0.5V supply voltage, which may be prevalent in the near future. Finally, compared to conventional 6T CMOS SRAM,this structure＇s transient responses are normal and its power dissipation is 10 times smaller.展开更多
This paper presents a method to reduce the energy consumption of multi-core systems characterized by processor cores and buses with discrete frequency levels under timing constraints.The proposed method takes the tran...This paper presents a method to reduce the energy consumption of multi-core systems characterized by processor cores and buses with discrete frequency levels under timing constraints.The proposed method takes the transformations of the original task graphs,which include dependent tasks located in different iterations,as inputs.The proposed method utilizes mapping selection as well as joint processor and communication frequency scaling to implement energy reduction.We conduct experiments on several random task graphs.Experimental results show that the proposed method can achieve substantial energy reduction compared with previous work under the same hard timing constraints.展开更多
Low power supply operation with leakage power reduction is the prime concern in modern nano-scale CMOS memory devices. In the present scenario, low leakage memory architecture becomes more challenging, as it has 30% o...Low power supply operation with leakage power reduction is the prime concern in modern nano-scale CMOS memory devices. In the present scenario, low leakage memory architecture becomes more challenging, as it has 30% of the total chip power consumption. Since, the SRAM cell is low in density and most of memory processing data remain stable during the data holding operation, the stored memory data are more affected by the leakage phenomena in the circuit while the device parameters are scaled down. In this survey, origins of leakage currents in a short-channel device and various leakage control techniques for ultra-low power SRAM design are discussed. A classification of these approaches made based on their key design and functions, such as biasing technique, power gating and multi-threshold techniques. Based on our survey, we summarize the merits and demerits and challenges of these techniques. This comprehensive study will be helpful to extend the further research for future implementations.展开更多
基金supported by the National Natural Science Foundation of China(Grant Nos.61376109,61434007,and 61176030)
文摘Charge sharing is becoming an important topic as the feature size scales down in fin field-effect-transistor （FinFET） technology. However, the studies of charge sharing induced single-event transient （SET） pulse quenching with bulk FinFET are reported seldomly. Using three-dimensional technology computer aided design （3DTCAD） mixed-mode simulations, the effects of supply voltage and body-biasing on SET pulse quenching are investigated for the first time in bulk FinFET process. Research results indicate that due to an enhanced charge sharing effect, the propagating SET pulse width decreases with reducing supply voltage. Moreover, compared with reverse body-biasing （RBB）, the circuit with forward body-biasing （FBB） is vulnerable to charge sharing and can effectively mitigate the propagating SET pulse width up to 53% at least. This can provide guidance for radiation-hardened bulk FinFET technology especially in low power and high performance applications.
文摘As the device size decreases, the soft error induced by space ions is becoming a great concern for the reliability of integrated circuits（ICs）. At present, the body biasing technique is widely used in highly scaled technologies. In the paper, using the three-dimensional technology computer-aided design（TCAD） simulation, we analyze the effect of the body biasing on the single-event charge collection in deep N-well technology. Our simulation results show that the body biasing mainly affects the behavior of the source, and the effect of body biasing on the charge collection for the nMOSFET and pMOSFET is quite different. For the nMOSFET, the RBB will increase the charge collection, while the FBB will reduce the charge collection. For the pMOSFET, the effect of RBB on the SET pulse width is small, while the FBB has an adverse effect. Moreover, the differenceof the effect of body biasing on the charge collection is compared in deep N-well and twin well.
基金supported by NSFC(61874005,61927901)the 111 Project(B18001).
文摘In this article,the body bias dependence of the bias temperature instability(BTI)in bulk FinFETs is experimentally studied,under different test conditions for the first time.In contrast to the traditional understanding that changing body bias has little impact on BTI degradation in FinFETs due to its weak body effect,it is observed that it actually has non-negligible impacts.And a forward body bias(FBB)can reduce the BTI degradation in FinFETs,which is opposite with the trend in planar devices.The underlying physics is found due to the trade-off between two competing factors.The results are helpful for understanding and modeling reliability in FinFETs.
文摘This paper presents research on a low power CMOS UWB LNA based on a cascoded common source and current-reused topology. A systematic approach for the design procedure from narrow band to UWB is developed and discussed in detail. The power reduction can be achieved by using body biased technique and current-reused topology. The optimum width of the major transistor device M1 is determined by the power-constraint noise optimization with inner parasitic capacitance between the gate and source terminal. The derivation of the signal amplification S21 by high frequency small signal model is displayed in the paper. The optimum design of the complete circuit was studied in a step by step analysis. The measurements results show that the proposed circuit has superior S11, gain, noise figure, and power consumption. From the measured results, S11 is lower than -12 dB, S22 is lower than -10 dB and forward gain S21 has an average value with 12 dB. The noise figure is from 4 to 5.7 dB within the whole band. The total power consumption of the proposed circuit including the output buffer is 4.6 mW with a supply voltage of 1 V. This work is implemented in a standard TSMC 0.18 μm CMOS process technology.
文摘Objectives:Prevalence rates of overweight and obesity are dramatically ever-increasing across the world.Therefore,this study was to evaluate the effect of mindfulness-based cognitive therapy(MBCT)on weight loss,hypertension,and attentional bias towards food cues in a group of women affected with this condition.Methods:A total of 45 participants were selected out of women referring to the Nutrition and Diet Therapy Clinic affiliated to Shahid Beheshti University of Medical Sciences,Iran,and then randomized into three groups of 15.The first experimental group was subjected to an energy-restricted diet therapy together with MBCT during 8 sessions,the second group took the diet therapy alone,and the third group received no intervention.Body mass index(BMI),hypertension,and attentional bias towards food cues were correspondingly evaluated before,at the end,and four weeks after the completion of the interventions.Results:The results of this study revealed that MBCT,along with diet therapy,had been significantly more effective in weight loss,decrease in BMI,lower systolic blood pressure(SBP),and attentional bias towards food cues compared with the diet therapy alone(P≤0.01).MBCT had no significant impact on the decline in diastolic blood pressure(DBP)in participants in the follow-up phase.Conclusion:This study demonstrated that MBCT along with the conventional diet therapy was more effective in weight loss,decrease in BMI,hypertension control,as well as attentional bias towards food cues than the diet therapy alone.
文摘The effects of back gate bias(BGEs) on radio-frequency(RF) performances in PD SOI n MOSFETs are presented in this paper. Floating body(FB) device, T-gate body-contact(TB) device, and tunnel diode body-contact(TDBC) device, of which the supply voltages are all 1.2 V, are compared under different back gate biases by different figures of merit, such as cut-off frequency( fT), maximum frequency of oscillation( fmax), etc. Because of the lack of a back gate conducting channel, the drain conductance(gd) of TDBC transistor shows a smaller degradation than those of the others, and the trans-conductance(gm) of TDBC is almost independent of back gate bias. The values of fT of TDBC are also kept nearly constant under different back gate biases. However, RF performances of FB and TB each show a significant degradation when the back gate bias is larger than ～ 20 V. The results indicate that TDBC structures could effectively improve the back gate bias in RF performance.
基金Project supported by the TCAD Simulation and SPICE Modeling of 0.13μm SOI Technology,China (Grant No. 2009ZX02306-002)
文摘The hysteresis effect in the output characteristics,originating from the floating body effect,has been measured in partially depleted（PD） silicon-on-insulator（SOI） MOSFETs at different back-gate biases.I D hysteresis has been developed to clarify the hysteresis characteristics.The fabricated devices show the positive and negative peaks in the I D hysteresis.The experimental results show that the I D hysteresis is sensitive to the back gate bias in 0.13-渭m PD SOI MOSFETs and does not vary monotonously with the back-gate bias.Based on the steady-state Shockley-Read-Hall（SRH） recombination theory,we have successfully interpreted the impact of the back-gate bias on the hysteresis effect in PD SOI MOSFETs.
文摘随着工艺技术的缩减,功耗问题日益严重,低功耗优化技术成了当前研究的一大重点.对处理器的功耗优化可以从设计过程、运行过程和空闲状态来考虑.本文重点研究了处理器在运行时的功率管理技术,即动态功率管理技术.它主要包括动态电压缩减DVS(Dynamic Voltage Scaling)和动态阈值电压缩减DVTS(Dynamic VTH Scaling)的方法,其中DVTS又是通过对衬底偏压的调整来实现阈值电压的调制的.本文重点研究了这两种技术的原理和实现结构,并分析了它们目前的研究和应用。
文摘A modified four transistor （4T） self-body-bias structured SRAM/SOI memory cell is proposed. The structure is designed and its parameters are obtained by performance simulation and analysis with TSUPREM4 and MEDICI.The structure saves area and its process is simplified by using the body resistor with buried p^＋ channel beneath the nMOS gate instead of the pMOS of 6T CMOS SRAM. Furthermore, this structure can operate safely with a 0.5V supply voltage, which may be prevalent in the near future. Finally, compared to conventional 6T CMOS SRAM,this structure＇s transient responses are normal and its power dissipation is 10 times smaller.
文摘This paper presents a method to reduce the energy consumption of multi-core systems characterized by processor cores and buses with discrete frequency levels under timing constraints.The proposed method takes the transformations of the original task graphs,which include dependent tasks located in different iterations,as inputs.The proposed method utilizes mapping selection as well as joint processor and communication frequency scaling to implement energy reduction.We conduct experiments on several random task graphs.Experimental results show that the proposed method can achieve substantial energy reduction compared with previous work under the same hard timing constraints.
文摘Low power supply operation with leakage power reduction is the prime concern in modern nano-scale CMOS memory devices. In the present scenario, low leakage memory architecture becomes more challenging, as it has 30% of the total chip power consumption. Since, the SRAM cell is low in density and most of memory processing data remain stable during the data holding operation, the stored memory data are more affected by the leakage phenomena in the circuit while the device parameters are scaled down. In this survey, origins of leakage currents in a short-channel device and various leakage control techniques for ultra-low power SRAM design are discussed. A classification of these approaches made based on their key design and functions, such as biasing technique, power gating and multi-threshold techniques. Based on our survey, we summarize the merits and demerits and challenges of these techniques. This comprehensive study will be helpful to extend the further research for future implementations.
