Point defect determination by photoluminescence and capacitance-voltage characterization in a GaN terahertz Gunn diode

Photoluminescence （PL） measurement is used to study the point defect distribution in a GaN terahertz Gunn diode, which is able to the degrade high-field transport characteristic during further device operation. PL, secondary ion mass spectroscopy （SIMS）, transmission electron microscope （TEM）, and capacitance-voltage （C-V） measurements are used to discuss the origin of point defects responsible for the yellow luminescence in structures. The point defect densities of about 1011 cm-2 in structures are extracted by analysis of C-V characterization. After thermal annealing treatment, diminishments of point defect densities in structures are efficiently demonstrated by PL and C-V results.

The physical process analysis of the capacitance-voltage characteristics of AlGaN/AlN/GaN high electron mobility transistors

This paper deduces the expression of the Schottky contact capacitance of AlGaN/A1N/GaN high electron mobility transistors （HEMTs）, which will help to understand the electron depleting process. Some material parameters related with capacitance-voltage profiling are given in the expression. Detailed analysis of the forward-biased capacitance has been carried on. The gate capacitance of undoped AlGaN/AlN/GaN HEMT will fall under forward bias. If a rising profile is obviously observed, the donor-like impurity or trap is possibly introduced in the barrier.

Accurate capacitance-voltage characterization of organic thin films with current injection

To deal with the invalidation of commonly employed series model and parallel model in capacitance-voltage(C-V)characterization of organic thin films when current injection is significant,a three-element equivalent circuit model is proposed.On this basis,the expression of real capacitance in consideration of current injection is theoretically derived by small-signal analysis method.The validity of the proposed equivalent circuit and theoretical expression are verified by a simulating circuit consisting of a capacitor,a diode,and a resistor.Moreover,the accurate C-V characteristic of an organic thin film device is obtained via theoretical correction of the experimental measuring result,and the real capacitance is 35.7%higher than the directly measured capacitance at 5-V bias in the parallel mode.This work strongly demonstrates the necessity to consider current injection in C-V measurement and provides a strategy for accurate C-V characterization experimentally.

Effect of F doping on capacitance-voltage characteristics of SiCOH low-k films metal-insulator-semiconductor

This paper investigates the capacitance-voltage （C-V） characteristics of F doping SiCOH low dielectric constant films metal-insulator-semiconductor structure. The F doping SiCOH films are deposited by decamethylcyclopentasilox-ane [DMCPS） and trifluromethane （CHF3） electron cyclotron resonance plasmas. With the CHF3/DMCPS flow rate ratio from 0 to 0.52, the positive excursion of C-V curves and the increase of fiat-band voltage VFB from -6.1 V to 32.2V are obtained. The excursion of C-V curves and the shift of VFB are related to the change of defects density and type at the Si/SiCOH interface due to the decrease of Si and O concentrations, and the increase of F concentration. At the CHF3/DMCPS flow rate ratio is 0.12, the compensation of F-bonding dangling bond to Si dangling bond leads to a small VFB of 2.0V.

High-frequency capacitance-voltage characteristics of the heterogeneous structure based on the model of spherical semiconductor particles in a dielectric

The dependence of the parameters of the capacitance effect in heterogeneous dispersed two-component structures based on semiconductors from the bulk fraction of the semiconductor component is modeled.The used method for determining the changes of the energy bands bending on the surface of the spherical semiconductor particle by applying dc electric field allowed to calculate the changes of the dipole moment and effective(taking into account the polarization of the free charge)dielectric constant of this semiconductor particle.This result allowed to use the known models of the dielectric constant of two-component structures for the description of the capacitance field effect in the heterogeneous structures.The relations allowing to estimate the value of the bulk donor concentration in the semiconductor component of the matrix of the heterogeneous system and the statistical mixture have been obtained.The approbation of the obtained calculation relations to evaluate the donor concentration in the ZnO grains of zinc oxide varistor ceramics leads to the correct values that are consistent with estimates of other methods and models.It is established that the sensitivity of the relative dielectric constant to the applied dc electric field is dependent on the bulk fraction of the semiconductor particles in the heterogeneous structures.The bulk fraction of the semiconductor particles significantly affects on the dielectric constant beginning with the values from
0:8 for matrix systems and
0:33 for statistical mixtures.

Electrochemical capacitance-voltage characterization of plasma-doped ultra-shallow junctions

Ultra-shallow Si p^(+)n junctions formed by plasma doping are characterized by electrochemical capacitance-voltage(ECV).By comparing ECV results with those of secondary ion mass spectroscopy(SIMS),it is found that the dopant concentration profiles in heavily-doped p+layer as well as junction depths measured by ECV are in good agreement with those measured by SIMS.However,the ECV measurement of dopant concentration in the underlying lightly doped n-type substrate is significantly influenced by the upper heavily-doped layer.The ECV technique is also easy to control and reproduce.The ECV results of ultra-shallow junctions(USJ)formed by plasma doping followed by different annealing processes show that ECV is capable of reliably characterizing a Si USJ with junction depth as low as 10 nm,and dopant concentration up to 10^(21) cm^(-3).Also,its depth resolution can be as fine as 1 nm.Therefore,it shows great potential in application for characterizing USJ in the sub-65 nm technology node CMOS devices.

Localized deep levels in Al_xGa_(1-x)N epitaxial films with various Al compositions

By using high-temperature deep-level transient spectroscopy （HT-DLTS） and other electrical measurement techniques, localized deep levels in n-type AlxGal xN epitaxial films with various A1 compositions （x = 0, 0.14, 0.24, 0.33, and 0.43） have been investigated. It is found that there are three distinct deep levels in AlxGal-xN films, whose level position with respect to the conduction band increases as AI composition increases. The dominant defect level with the activation energy deeper than 1.0 eV below the conduction band closely follows the Fermi level stabilization energy, indicating that its origin may be related to the defect complex, including the anti-site defects and divacancies in AlxGa1-xN films.

Preparation and Characterization of TiO₂and SiO₂Thin Films

Although scaling will continue for couple of decades but device geometries reaches to atomic size and limitation of quantum mechanical physical boundaries. To address these problems there is need of innovation in material science & engineering, device structure, and new nano devices based on different principle of physics. So TiO2 thin films have been grown on well clean N-type silicon substrates via a sol–gel spin coating method. MOS capacitor were fabricated and characterized with SiO2 and TiO2 as dielectric material on N-type silicon wafer. The thickness was measured by stylus profiler and found to be 510 ? and 528 ? for SiO2 and TiO2 respectively. Some of the material parameters were found from the measured Capacitance -Voltage (C-V) curve obtained by SUPREM-III (Stanford University Process Engineering Model Version 0-83) for SiO2 and C-V Keithly 590 analyzer for TiO2 thin films. The result shows that obtained TiO2 film present a dielectric constant of approximately 80. The refractive index was found to be 2.4 and optical constant was 5.43 obtained from Ellipsometry. Band gap 3.6 eV of TiO2 was calculated by spectrophotometer and Surface morphology was obtained using Scanning Electron Microscope (SEM-JEOL) micrograph. The aluminum (Al) metal was deposited by the thermal evaporation system on the back side of the sample for the ohmic contact. Analysis shows that TiO2 may be acceptable as a viable substitute for high k dielectric in order to prevent the tunneling current problems.

Electrical characteristics of MOS capacitor with HfTiON gate dielectric and HfTiSiON interlayer

The paper reports that Hfrio dielectric is deposited by reactive co-sputtering of Hf and Ti targets in an Ar/O2 ambience, followed by an annealing in different gas ambiences of N2, NO and NH3 at 600℃ for 2 min. Capacitancevoltage and gate-leakage properties are characterized and compared. The results indicate that the NO-annealed sample exhibits the lowest interface-state and dielectric-charge densities and best device reliability. This is attributed to the fact that nitridation can create strong Si≡N bonds to passivate dangling Si bonds and replace strained Si-O bonds, thus the sample forms a hardened dielectric/Si interface with high reliability.

Capacitance characteristics of metal-oxide-semiconductor capacitors with a single layer of embedded nickel nanoparticles for the application of nonvolatile memory

This paper reports that metal-oxide-semiconductor （MOS） capacitors with a single layer of Ni nanopartictes were successfully fabricated by using electron-beam evaporation and rapid thermal annealing for application to nonvolatile memory. Experimental scanning electron microscopy images showed that Ni nanoparticles of about 5 nm in diameter were clearly embedded in the SiO2 layer on p-type Si （100）. Capacitance-voltage measurements of the MOS capacitor show large flat-band voltage shifts of 1.8 V, which indicate the presence of charge storage in the nickel nanoparticles. In addition, the charge-retention characteristics of MOS capacitors with Ni nanoparticles were investigated by using capacitance-time measurements. The results showed that there was a decay of the capacitance embedded with Ni nanoparticles for an electron charge after 104 s. But only a slight decay of the capacitance originating from hole charging was observed. The present results indicate that this technique is promising for the efficient formation or insertion of metal nanoparticles inside MOS structures.

Effect of alumina thickness on Al_2O_3/InP interface with post deposition annealing in oxygen ambient

In this paper, the effect of alumina thickness on Al2O3/InP interface with post deposition annealing （PDA） in the oxygen ambient is studied. Atomic layer deposited （ALD） Al2O3 films with four different thickness values （5 nm, 7 nm, 9 nm, 11 rim） are deposited on InP substrates. The capacitance-voltage （C-V） measurement shows a negative correlation between the alumina thickness and the frequency dispersion. The X-ray photoelectronspectroscopy （XPS） data present significant growth of indium-phosphorus oxide near the Al2O3/InP interface, which indicates serious oxidation of InP during the oxygen annealing. The hysteresis curve shows an optimum thickness of 7 nm after PDA in an oxygen ambient at 500 ℃ for 10 min. It is demonstrated that both sides of the interface are impacted by oxygen during post deposition annealing. It is suggested that the final state of the interface is of reduced positively charged defects on Al2O3 side and oxidized InP, which degrades the interface.

C-V Characterization of α-Fe_2O_3/Block-Copolymer Composite Particulate Films

α-Fe_2O_3 nanocrystal was encapsulated by a block-copolymer, hydroxylated poly (styrene-b- butadiene-styrene) (HO-SBS) to fabricate composite microspheres with α-Fe_2O_3 cores and HOSBS shell. Its film fabricated on n-Si wafer acts as the insulator layer in the metal-insulator- semiconductor(MIS) structure. The capacitance-voltage (C-V) properties were measured to characterize the composite particulate films.

Measurement Process of MOSFET Device Parameters with VEE Pro Software for DP4T RF Switch

To design a Double-Pole Four-Throw (DP4T) RF switch, measurement of device parameters is required. In this DP4T RF switch CMOS is a unit cell, so with a thin oxide layer of thickness 628 ? which is measured optically. Some of the material parameters were found by the curve drawn between Capacitance versus Voltage (C-V) and Capacitance versus Frequency (C-F) with the application of Visual Engineering Environment Programming (VEE Pro). To perform the measurement processing at a distance, from the hazardous room, we use VEE Pro software. In this research, to acquire a fine result for RF MOSFET, we vary the voltage with minor increments and perform the measurements by vary the applying voltage from +5 V to –5 V and then back to +5 V again and then save this result in a data sheet with respect to temperature, voltage and frequency using this program. We have investigated the characteristics of RF MOSFET, which will be used for the wireless telecommunication systems.

The Charge Storage of Doubly Stacked Nanocrystalline-Si based Metal Insulator Semiconductor Memory Structure

Doubly stacked nanocrystalline-Si (nc-Si) based metal insulator semiconductor memory structure was fabricated by plasma enhanced chemical vapor deposition. Capacitance-Voltage (C-V) and capacitance-time (C-t) measurements were used to investigate electron tunnel, storage and discharging characteristic. The C-V results show that the flatband voltage increases at first, then decreases and finally increases, exhibiting a clear deep at gate voltage of 9 V. The de-creasing of flatband voltage at moderate programming bias is attributed to the transfer of electrons from the lower nc-Si layer to the upper nc-Si layer. The C-t measurement results show that the charges transfer in the structure strongly de-pends on the hold time and the flatband voltage decreases markedly with increasing the hold time.

压电电子学金属-绝缘体-半导体晶体管的电容-电压特性

压电半导体具有压电效应和半导体电学特性,可以用于压电电子学器件和压电光电子学器件.压电电子学器件和压电光电子学器件利用外加应变产生的压电电荷调控压电电子学pn结、金属半导体(M-S)接触的载流子传输、分离、复合等过程.压电电子学器件具有灵敏度高、响应速度快和功耗超低的优点,非常适合在自驱动系统中应用,因此在物联网、可穿戴系统、植入式传感系统具有巨大的应用价值.压电电荷的分布宽度能够显著影响压电电子学器件的传感性能,是压电电子学器件重要参数之一.压电电荷的分布宽度则可以通过压电电子学器件的电容电压(C-V)特性获得.本文以压电电子学金属-绝缘体-半导体(MIS)晶体管为例,提出对压电电荷分布影响进行测量和计算的理论模型,并进行了数值模拟,为以C-V测量为基础的结区压电电荷分布宽度实验设计给出了可行的理论方案.

Fabrication and modeling of multi-layer metal–insulator-metal capacitors

This paper presents the fabrication and modeling for capacitance-voltage characteristics of multi-layer metal-insulator-metal capacitors. It is observed that, due the applied electric field, the effective dielectric constant of the stack was increased due to the accumulation of charges at the interface of high-to-low conductance materials. It is observed that the Maxwell-Wagner polarization is dominant at low frequencies （〈10 kHz）. By introducing carrier tunneling probability of the dielectric stack, the model presented in this paper shows a good agreement with experimental results. The presented model indicates that the nonlinearity can be suppressed by choosing the similar permittivity dielectric materials for fabrication of multilayer metal insulator metal capacitors.

Fabrication of a novel MOS diode by indium incorporation control for microelectronic applications

Control of the electronic parameters on a novel metal–oxide–semiconductor（MOS）diode by indium doping incorporation is emphasized and investigated.The electronic parameters,such as ideality factor,barrier height（BH）,series resistance,and charge carrier density are extracted from the current–voltage（I–V）and the capacitance–voltage（C–V）characteristics.The properties of the MOS diode based on 4%,6% and 8% indium doped tin oxide are largely studied.The Ag/SnO2/nSi/Au MOS diode is fabricated by spray pyrolysis route,at 300℃ from the In-doped SnO2layer.This was grown onto n-type silicon and metallic（Au）contacts which were made by thermal evaporation under a vacuum@10^-5 Torr and having a thickness of 120 nm and a diameter of 1 mm.Determined by the Cheung-Cheung approximation method,the series resistance increases（334–534Ω）with the In doping level while the barrier height（BH）remains constant around 0.57 V.The Norde calculation technique gives a similar BH value of 0.69 V but the series resistance reaches higher values of 5500Ω.The indium doping level influences on the characteristics of Ag/SnO2：In/Si/Au MOS diode while the 4% indium level causes the capacitance inversion and the device turns into p-type material.

Effect of size and position of gold nanocrystals embedded in gate oxide of SiO_(2)/Si MOS structures

The influence of single and double layered gold(Au)nanocrystals(NC),embedded in SiO_(2) matrix,on the electrical characteristics of metal–oxide–semiconductor(MOS)structures is reported in this communication.The size and position of the NCs are varied and study is made using Sentaurus TCAD simulation tools.In a single NC-layered MOS structure,the role of NCs is more prominent when they are placed closer to SiO_(2)/Si-substrate interface than to SiO_(2)/Al–gate interface.In MOS structures with larger NC dots and double layered NCs,the charge storage capacity is increased due to charging of the dielectric in the presence of NCs.Higher breakdown voltage and smaller leakage current are also obtained in the case of dual NC-layered MOS device.A new phenomenon of smearing out of the capacitance–voltage curve is observed in the presence of dual NC layer indicating generation of interface traps.An internal electric field developed between these two charged NC layers is expected to generate such interface traps at the SiO_(2)/Si interface.

Analysis on electrical transport characteristic of 8-hydroquinoline aluminum film

The current_voltage and capacitance_voltage characteristic of the organic single_layered electroluminescent diode utilizing 8_hydroquinoline aluminum as active layer have been measured under bias ranging from -5 V to 28 V in this work. A simple model for charge transport process of 8_hydroquinoline aluminum layer is proposed to illuminate the conductivity characteristic of the diode.