It is still challenging to fully integrate computing in memory chip as edge learning devices.In recent work published on Science,a fully-integrated chip based on neuromorphic memristors was developed for edge learning...It is still challenging to fully integrate computing in memory chip as edge learning devices.In recent work published on Science,a fully-integrated chip based on neuromorphic memristors was developed for edge learning as artificial neural networks with functionality of synapses,dendrites,and somas.A crossbar-array memristor chip facilitated edge learning including hardware realization,learning algorithm,and cycle-parallel sign-and threshold-based learning(STELLAR)scheme.The motion control and demonstration platforms were executed to improve the edge learning ability for adapting to new scenarios.展开更多
This paper introduces a new datapath architecture for reconfigurable processors. The proposed datapath is based on Network-on-Chip approach and facilitates tight coupling of all functional units. Reconfigurable functi...This paper introduces a new datapath architecture for reconfigurable processors. The proposed datapath is based on Network-on-Chip approach and facilitates tight coupling of all functional units. Reconfigurable functional elements can be dynamically allocated for application specific optimizations, enabling polymorphic computing. Using a modified network simulator, performance of several NoC topologies and parameters are investigated with standard benchmark programs, including fine grain and coarse grain computations. Simulation results highlight the flexibility and scalability of the proposed polymorphic NoC processor for a wide range of application domains.展开更多
A method for determination of tool-chip contact length is theoreticallypresented in orthogonal metal machining. By using computer simulation and based on the analyses ofthe elastro-plastic deformation with lagrangian ...A method for determination of tool-chip contact length is theoreticallypresented in orthogonal metal machining. By using computer simulation and based on the analyses ofthe elastro-plastic deformation with lagrangian finite element method in the deformation zone, theaccumulated representative length of the low layer, the tool-chip contact length of the chipcontacting the tool rake are calculated, experimental studies are also carried out with 0.2 percentcarbon steel. It is shown that the tool-chip contact lengths obtained from computer simulation havea good agreement with those of measured values.展开更多
Developed a new program structure using in single chip computer system, which based on multitasking mechanism. Discussed the specific method for realization of the new structure. The applied sample is also provided.
In order to cool computer chip efficiently with the least noise, a single phase water-cooling radiator for computer chip driven by piezoelectric pump with two parallel-connection chambers is developed. The structure a...In order to cool computer chip efficiently with the least noise, a single phase water-cooling radiator for computer chip driven by piezoelectric pump with two parallel-connection chambers is developed. The structure and work principle of this radiator is described. Material, processing method and design principles of whole radiator are also explained. Finite element analysis （FEA） software, ANSYS, is used to simulate the heat distribution in the radiator. Testing equipments for water-cooling radiator are also listed. By experimental tests, influences of flowrate inside the cooling system and fan on chip cooling are explicated. This water-cooling radiator is proved more efficient than current air-cooling radiator with comparison experiments. During cooling the heater which simulates the working of computer chip with different power, the water-cooling radiator needs shorter time to reach lower steady temperatures than current air-cooling radiator.展开更多
Spiking neural networks(SNNs)utilize brain-like spatiotemporal spike encoding for simulating brain functions.Photonic SNN offers an ultrahigh speed and power efficiency platform for implementing high-performance neuro...Spiking neural networks(SNNs)utilize brain-like spatiotemporal spike encoding for simulating brain functions.Photonic SNN offers an ultrahigh speed and power efficiency platform for implementing high-performance neuromorphic computing.Here,we proposed a multi-synaptic photonic SNN,combining the modified remote supervised learning with delayweight co-training to achieve pattern classification.The impact of multi-synaptic connections and the robustness of the network were investigated through numerical simulations.In addition,the collaborative computing of algorithm and hardware was demonstrated based on a fabricated integrated distributed feedback laser with a saturable absorber(DFB-SA),where 10 different noisy digital patterns were successfully classified.A functional photonic SNN that far exceeds the scale limit of hardware integration was achieved based on time-division multiplexing,demonstrating the capability of hardware-algorithm co-computation.展开更多
基金funding support from the National Natural Science Foundation of China(52172205).
文摘It is still challenging to fully integrate computing in memory chip as edge learning devices.In recent work published on Science,a fully-integrated chip based on neuromorphic memristors was developed for edge learning as artificial neural networks with functionality of synapses,dendrites,and somas.A crossbar-array memristor chip facilitated edge learning including hardware realization,learning algorithm,and cycle-parallel sign-and threshold-based learning(STELLAR)scheme.The motion control and demonstration platforms were executed to improve the edge learning ability for adapting to new scenarios.
文摘This paper introduces a new datapath architecture for reconfigurable processors. The proposed datapath is based on Network-on-Chip approach and facilitates tight coupling of all functional units. Reconfigurable functional elements can be dynamically allocated for application specific optimizations, enabling polymorphic computing. Using a modified network simulator, performance of several NoC topologies and parameters are investigated with standard benchmark programs, including fine grain and coarse grain computations. Simulation results highlight the flexibility and scalability of the proposed polymorphic NoC processor for a wide range of application domains.
基金This project is supported by Provincial Natural Science Foundation of Heilongjiang(No.A9809).
文摘A method for determination of tool-chip contact length is theoreticallypresented in orthogonal metal machining. By using computer simulation and based on the analyses ofthe elastro-plastic deformation with lagrangian finite element method in the deformation zone, theaccumulated representative length of the low layer, the tool-chip contact length of the chipcontacting the tool rake are calculated, experimental studies are also carried out with 0.2 percentcarbon steel. It is shown that the tool-chip contact lengths obtained from computer simulation havea good agreement with those of measured values.
文摘Developed a new program structure using in single chip computer system, which based on multitasking mechanism. Discussed the specific method for realization of the new structure. The applied sample is also provided.
基金This project is supported by National Hi-tech Research and Development Program of China (863 Program, No. 2002AA404250)National Natural Science Foundation of China (No. 50575093).
文摘In order to cool computer chip efficiently with the least noise, a single phase water-cooling radiator for computer chip driven by piezoelectric pump with two parallel-connection chambers is developed. The structure and work principle of this radiator is described. Material, processing method and design principles of whole radiator are also explained. Finite element analysis （FEA） software, ANSYS, is used to simulate the heat distribution in the radiator. Testing equipments for water-cooling radiator are also listed. By experimental tests, influences of flowrate inside the cooling system and fan on chip cooling are explicated. This water-cooling radiator is proved more efficient than current air-cooling radiator with comparison experiments. During cooling the heater which simulates the working of computer chip with different power, the water-cooling radiator needs shorter time to reach lower steady temperatures than current air-cooling radiator.
基金supports from the National Key Research and Development Program of China (Nos.2021YFB2801900,2021YFB2801901,2021YFB2801902,2021YFB2801903,2021YFB2801904)the National Outstanding Youth Science Fund Project of National Natural Science Foundation of China (No.62022062)+1 种基金the National Natural Science Foundation of China (No.61974177)the Fundamental Research Funds for the Central Universities (No.QTZX23041).
文摘Spiking neural networks(SNNs)utilize brain-like spatiotemporal spike encoding for simulating brain functions.Photonic SNN offers an ultrahigh speed and power efficiency platform for implementing high-performance neuromorphic computing.Here,we proposed a multi-synaptic photonic SNN,combining the modified remote supervised learning with delayweight co-training to achieve pattern classification.The impact of multi-synaptic connections and the robustness of the network were investigated through numerical simulations.In addition,the collaborative computing of algorithm and hardware was demonstrated based on a fabricated integrated distributed feedback laser with a saturable absorber(DFB-SA),where 10 different noisy digital patterns were successfully classified.A functional photonic SNN that far exceeds the scale limit of hardware integration was achieved based on time-division multiplexing,demonstrating the capability of hardware-algorithm co-computation.
