A Cascade Multilevel Inverter Using a Single DC Source

3.SWITCHING ANGLES If the nominal capacitor voltage is chosen as Vdc/2, then one can compute the switching anglesθ1,θ2,andθ3.Following the development,the Fourier series expan- sion of the(staircase)output voltage waveform of the multilevel inverter as shown in Fig.2(a)

Gaussian shaper for nuclear pulses based on multilevel cascade convolution

For nuclear measurements,it is necessary to obtain accurate information from nuclear pulses,which should be obtained by first shaping the pulses outputted by the detectors.However,commonly used pulse-shaping algorithms have certain problems.For example,certain pulse-shaping algorithms have long dead-times in high-counting-rate environments or are difficult to achieve in digital systems.Gaussian signals are widely used in analog nuclear instruments owing to their symmetry and completeness.A Gaussian signal is usually implemented by using a multilevel S–K filter in series or in parallel.It is difficult to construct a real-time digital Gaussian filter for the complex Gaussian filtering algorithm.Based on the multilevel cascade convolution,a pulse-shaping algorithm for double exponential signals is proposed in this study,which,in addition to double exponential signals,allows more complex output signal models to be used in the new algorithm.The proposed algorithm can be used in high-counting-rate environments and has been implemented in an FPGA with fewer multipliers than those required in other traditional Gaussian pulse-shaping algorithms.The offline processing results indicated that the average peak base width of the output-shaped pulses obtained using the proposed algorithm was reduced compared with that obtained using the traditional Gaussian pulse-shaping algorithm.Experimental results also demonstrated that signal-to-noise ratios and energy resolutions were improved,particularly for pulses with a low energy.The energy resolution was improved by 0.1–0.2%while improving the counting rate.

Synchronization analysis on cascaded multilevel converters with distributed control

Cascaded multilevel converters built with integrated modules have many advantages such as increased power density,flexible distributed control,multi-functionality,increased reliability and short design cycles.However,the system performance will be affected due to the synchronization errors among each integrated modules.This paper analyzes the impact of the three kinds of synchronization errors on the whole system performance,as well as detailed synchronization implementation.Some valuable conclusions are derived from the theoretical analysis,simulations and experimental results.

Modeling and Analysis of Variable Frequency Inverted Sine PWM Technique for a Hybrid Cascaded Multilevel Inverter

In cascaded H-bridge multilevel inverter, a variable frequency inverted sine PWM technique is modeled for hybrid electric vehicles. It has a particular advantage of increasing power which is achieved using series connection of H-bridge and also this topology is capable to produce superior spectral quality with considerable improvement of fundamental voltage. The variable frequency inverted sine PWM technique produces lesser torque ripple and enhances the fundamental output voltage mainly at lower modulation index ranges. The topologies of multilevel inverter are flying capacitor, diode clamped and cascaded inverter. In the paper, we will discuss about the cascaded multilevel inverter based on inverted sine PWM technique. The two switching strategies widely used to control multilevel inverters are constant frequency inverted sine PWM (CF-ISPWM) and variable frequency inverted sine PWM (VF-ISPWM). This implies that switch utilization substantially reduces 32.35% of the constant frequency inverted sine PWM switching technique. The performance of the technique is validated in terms of Total Harmonic Distortion (THD) and Torque ripple which significantly reduces when compared to constant frequency ISPWM. The analysis of conventional triangular PWM inverter and inverted sine PWM inverter using constant and variable switching scheme is done in MATLAB Simulink and verified experimentally by FPGA Spartan 3E processor.

Performance Metric of Z Source CHB Multilevel Inverter FED IM for Selective Harmonic Elimination and THD Reduction

This paper focuses on a Z source cascaded multilevel inverter which is designed to minimize harmonics in the output voltage. A balanced dc-link peak voltage can be achieved. The power generation module is built by PV panels which are connected to Z-Source Cascade H-bridge inverter. Cascaded multilevel inverter can achieve the distributed maximum power point tracking to increase the system efficiency and achieve high voltage/high power grid tie without a transformer. This paper analyzes the different PWM switching scheme and the operating states of a ZSI module and comparison is made with different PWM and total harmonic distortion of various PWM schemes.

Research on Multi Level Dynamic Voltage Compensator based on MMC

The modular multilevel converter （MMC） is a highly modular, easy to expand; the output voltage waveform is good, especially suitable for application in high voltage power system. This article first introduces the circuit topology and principle of MMC, and the main technical characteristics of MMC. And according to the relationship between the drop power voltage and the load power factor, proposed three working modes of the minimum energy compensation strategy. It is shown that MMC has good application prospect in future medium or high- voltage high power applications, especially be one of candidates for HVDC system application.

Inter-cluster Voltage Balancing Control of Modular Multilevel Cascaded Converter Under Unbalanced Grid Voltage

This paper presents a novel inter-cluster direct current(DC)capacitor voltage balancing control scheme for the single-star configured modular multilevel cascaded converter(MMCC)-based static synchronous compensator(STATCOM)under unbalanced grid voltage.The negative-sequence component of grid voltage at the point of common connection(PCC)causes unbalanced active power flow in the phase limbs of converter.This leads to the imbalance of DC voltages of the sub-module capacitors across the MMCC phases,and consequently,the malfunction of converter.The proposed solution is to inject both negative-sequence current(NSC)and zero-sequence voltage(ZSV)into the phase limbs of MMCC.A quantification factor Qf is used to achieve the sharing of inter-cluster active pow-er between the NSC and ZSV injection methods.Accurate determination of the quantification factor has been presented.In addition to maintaining the DC voltages of sub-module capacitor across the MMCC phases balanced,it also prevents the overcurrent and overvoltage of converter by injecting NSC and ZSV with the right proportion.The control scheme is validated on a 3.54 kV 1.2 MVA power system using MMCC-based STATCOM with 3-level bridge cells as sub-modules.The results show that the proposed scheme provides superior effectiveness in eliminating the voltage imbalance of DC capacitor in the phase limb while maintaining low voltage and current ratings.