In recent days, the multilevel inverter technology is widely applied to domestic and industrial applications for medium voltage conversion. But, the power quality issues of the multilevel inverter limit the usage of m...In recent days, the multilevel inverter technology is widely applied to domestic and industrial applications for medium voltage conversion. But, the power quality issues of the multilevel inverter limit the usage of much sensitive equipment like medical instruments. The lower distortion level of the output voltage and current can generate a quality sinusoidal output voltage in inverters and they can be used for many applications. The harmonics can cause major problems in equipments due to the nonlinear loads connected with the power system. So, it is necessary to minimize the losses to raise its overall efficiency. In this paper, a new topology of seven level asymmetrical cascaded H-bridge multilevel inverter with a Fuzzy logic controller had been implemented to reduce the Total Harmonic Distortion (THD) and to improve the overall performance of the inverter. The proposed model is well suited for use with a solar PV application. In this topology, only six IGBT switches are used with three different voltage ratings of PV modules (1:2:4). The lower number of semiconductor switches leads to minimizing overall di/dt ratings and voltage stress on each switches and switching losses. The gate pulses generated by Sinusoidal Pulse Width Modulation (SPWM) technique with a Fuzzy logic controller are also introduced. A buck-boost converter is used to maintain the constant PV voltage level integrated by an MPPT technique followed by Perturb and Observer algorithm is also implemented. The MPPT is used to harness the maximum power of solar radiations under its various climatic conditions. The new topology is evaluated by a Matlab/Simulink model and compared with a hardware model. The results proved that the THD achieved by this topology is 1.66% and realized that it meets the IEEE harmonic standards.展开更多
This work presents an implementation of an innovative single phase multilevel inverter using capacitors with reduced switches. The proposed Capacitor pattern H-bridge Multilevel Inverter (CPHMLI) topology consists of ...This work presents an implementation of an innovative single phase multilevel inverter using capacitors with reduced switches. The proposed Capacitor pattern H-bridge Multilevel Inverter (CPHMLI) topology consists of a proper number of Capacitor connected with switches and power sources. The advanced switching control supplied by Pulse Width Modulation (PDPWM) to attain mixed staircase switching state. The charging and discharging mode are achieved by calculating the voltage error at the load. Furthermore, to accomplish the higher voltage levels at the output with less number of semiconductors switches and simple commutation designed using CPHMLI topology. To prove the performance and effectiveness of the proposed approach, a set of experiments performed under various load conditions using MATLAB tool.展开更多
文摘In recent days, the multilevel inverter technology is widely applied to domestic and industrial applications for medium voltage conversion. But, the power quality issues of the multilevel inverter limit the usage of much sensitive equipment like medical instruments. The lower distortion level of the output voltage and current can generate a quality sinusoidal output voltage in inverters and they can be used for many applications. The harmonics can cause major problems in equipments due to the nonlinear loads connected with the power system. So, it is necessary to minimize the losses to raise its overall efficiency. In this paper, a new topology of seven level asymmetrical cascaded H-bridge multilevel inverter with a Fuzzy logic controller had been implemented to reduce the Total Harmonic Distortion (THD) and to improve the overall performance of the inverter. The proposed model is well suited for use with a solar PV application. In this topology, only six IGBT switches are used with three different voltage ratings of PV modules (1:2:4). The lower number of semiconductor switches leads to minimizing overall di/dt ratings and voltage stress on each switches and switching losses. The gate pulses generated by Sinusoidal Pulse Width Modulation (SPWM) technique with a Fuzzy logic controller are also introduced. A buck-boost converter is used to maintain the constant PV voltage level integrated by an MPPT technique followed by Perturb and Observer algorithm is also implemented. The MPPT is used to harness the maximum power of solar radiations under its various climatic conditions. The new topology is evaluated by a Matlab/Simulink model and compared with a hardware model. The results proved that the THD achieved by this topology is 1.66% and realized that it meets the IEEE harmonic standards.
文摘This work presents an implementation of an innovative single phase multilevel inverter using capacitors with reduced switches. The proposed Capacitor pattern H-bridge Multilevel Inverter (CPHMLI) topology consists of a proper number of Capacitor connected with switches and power sources. The advanced switching control supplied by Pulse Width Modulation (PDPWM) to attain mixed staircase switching state. The charging and discharging mode are achieved by calculating the voltage error at the load. Furthermore, to accomplish the higher voltage levels at the output with less number of semiconductors switches and simple commutation designed using CPHMLI topology. To prove the performance and effectiveness of the proposed approach, a set of experiments performed under various load conditions using MATLAB tool.
