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Improvement of Operation Characteristics for MONOS Charge Trapping Flash Memory with SiGe Buried Channel
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作者 Zhao-Zhao Hou Gui-Lei Wang +2 位作者 Jia-Xin Yao Qing-Zhu Zhang Hua-Xiang Yin 《Chinese Physics Letters》 SCIE CAS CSCD 2018年第5期110-114,共5页
We propose and investigate a novel metal/SiO_2/Si_3N_4/SiO_2/SiGe charge trapping flash memory structure(named as MONOS), utilizing Si Ge as the buried channel. The fabricated memory device demonstrates excellent pr... We propose and investigate a novel metal/SiO_2/Si_3N_4/SiO_2/SiGe charge trapping flash memory structure(named as MONOS), utilizing Si Ge as the buried channel. The fabricated memory device demonstrates excellent programerasable characteristics attributed to the fact that more carriers are generated by the smaller bandgap of Si Ge during program/erase operations. A flat-band voltage shift 2.8 V can be obtained by programming at +11 V for 100 us. Meanwhile, the memory device exhibits a large memory window of ~7.17 V under ±12 V sweeping voltage, and a negligible charge loss of 18% after 104 s' retention. In addition, the leakage current density is lower than 2.52 × 10^(-7) A·cm^(-2) below a gate breakdown voltage of 12.5 V. Investigation of leakage current-voltage indicates that the Schottky emission is the predominant conduction mechanisms for leakage current. These desirable characteristics are ascribed to the higher trap density of the Si_3N_4 charge trapping layer and the better quality of the interface between the SiO_2 tunneling layer and the Si Ge buried channel. Therefore, the application of the Si Ge buried channel is very promising to construct 3 D charge trapping NAND flash devices with improved operation characteristics. 展开更多
关键词 FB Improvement of Operation Characteristics for MONOS Charge Trapping Flash Memory with SiGe Buried channel
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Backgating effect in GaAs FETs with a channel–semi-insulating substrate boundary 被引量:1
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作者 Ahmed Chaouki Megherbi Said Benramache Abderrazak Guettaf 《Journal of Semiconductors》 EI CAS CSCD 2014年第3期33-38,共6页
This study focuses on modeling the effects of deep hole traps, mainly the effect of the substrate(backgating effect) in a GaAs transistor MESFT. This effect is explained by the existence, at the interface, of a spac... This study focuses on modeling the effects of deep hole traps, mainly the effect of the substrate(backgating effect) in a GaAs transistor MESFT. This effect is explained by the existence, at the interface, of a space charge zone. Any modulation in this area leads to response levels trapping the holes therein to the operating temperature. We subsequently developed a model treating the channel substrate interface as an N–P junction, allowing us to deduce the time dependence of the component parameters of the total resistance R ds, the pinch-off voltage V P, channel resistance, fully open R co and the parasitic series resistance R S to bind the effect trap holes H1and H0. When compared with the experimental results, the values of the R DS(t S/ model for both traps show that there is an agreement between theory and experiment; it has inferred parameter traps, namely the density and the time constant of the trap. This means that a space charge region exists at the channel–substrate interface and that the properties can be approximated to an N–P junction. 展开更多
关键词 traps pinch-off voltage resistance channel substrate interface
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