TRANSIENT CHARACTERISTIC ANALYSIS OF HIGH TEMPERATURE CMOS DIGITAL INTEGRATED CIRCUITS

This paper analyses the transient characteristics of high temperature CMOS inverters and gate circuits, and gives the computational formulas of their rise time, fall time and delay time. It may be concluded that the transient characteristics of CMOS inverters and gate circuits deteriorate due to the reduction of carrier mobilities and threshold voltages of MOS transistors and the increase of leakage currents of MOS transistors drain terminal pn junctions. The calculation results can explain the experimental phenomenon.

Matching processing in the design of integrated circuits

In the design of the integrated circuits, in order to ensure that the designed products conform to the presupposed parameters, while designing the schematic diagrams of the circuits, we should also strengthen the layout design. Especially in the design of the analog circuits, in the layout design, there is a high degree of matching requirement for the MOS. It will have an important impact on the performance of the chips. Based on this perspective, the author of this paper analyzes how to realize the matching of the three aspects of the MOS, the resistance and the capacitance in the integrated circuit design, in order to avoid the problem of the mismatch due to the arts and crafts.

Concise Modeling of Amorphous Dual-Gate In-Ga-Zn-O Thin-Film Transistors for Integrated Circuit Designs

An analytical model for current-voltage behavior of amorphous In-Ga-Zn-O thin-film transistors（a-IGZO TFTs）with dual-gate structures is developed.The unified expressions for synchronous and asynchronous operating modes are derived on the basis of channel charges,which are controlled by gate voltage.It is proven that the threshold voltage of asynchronous dual-gate IGZO TFTs is adjusted in proportion to the ratio of top insulating capacitance to the bottom insulating capacitance（C_（TI）/C_（BI））.Incorporating the proposed model with Verilog-A,a touch-sensing circuit using dual-gate structure is investigated by SPICE simulations.Comparison shows that the touch sensitivity is increased by the dual-gate IGZO TFT structure.

Microwave Integrated Circuit Design Handbook

作者:Reinmut K.Hoffmann(1984 IEEE微波奖获得者) 出版:Artech House公司(美国)1987年本书给出适于微波工程师和研究人员应用的有关MIC方面的基础技术、电性能和设计。侧重于电性能分析和设计,强调应用。对于每一种设计技术和应用均作出较清楚的叙述和完整的处理。本书尽量给出电路的物理描述,避免过于冗长的数学公式,内容包含对下列议题的详细评述与研讨:

High performance integrated photonic circuit based on inverse design method

The basic indexes of all-optical integrated photonic circuits include high-density integration,ultrafast response and ultralow energy consumption.Traditional methods mainly adopt conventional micro/nano-structures.The overall size of the circuit is large,usually reaches hundreds of microns.Besides,it is difficult to balance the ultrafast response and ultra-low energy consumption problem,and the crosstalk between two traditional devices is difficult to overcome.Here,we propose and experimentally demonstrate an approach based on inverse design method to realize a high-density,ultrafast and ultra-low energy consumption integrated photonic circuit with two all-optical switches controlling the input states of an all-optical XOR logic gate.The feature size of the whole circuit is only 2.5μm×7μm,and that of a single device is 2μm×2μm.The distance between two adjacent devices is as small as 1.5μm,within wavelength magnitude scale.Theoretical response time of the circuit is 150 fs,and the threshold energy is within 10 fJ/bit.We have also considered the crosstalk problem.The circuit also realizes a function of identifying two-digit logic signal results.Our work provides a new idea for the design of ultrafast,ultra-low energy consumption all-optical devices and the implementation of high-density photonic integrated circuits.

A novel voltage output integrated circuit temperature sensor

The novel integrated circuit (IC) temperature sensor presented in this paper works similarly as a two terminal Zener, has breakdown voltage directly proportional to Kelvin temperature at 10 mV/℃, with typical error of less than ±1.0℃ over a temperature range from -50℃ to +125℃. In addition to all the features that conventional IC temperature sensors have, the new device also has very low static power dissipation ( 0.5 mW ) , low output impedance ( less than 1Ω), excellent stability, high reproducibility, and high precision. The sensor's circuit design and layout are discussed in detail. Applications of the sensor include almost any type of temperature sensing over the range of -50℃-+125℃. The low impedance and linear output of the device make interfacing the readout or control circuitry especially easy. Due to the excellent performance and low cost of this sensor, more applications of the sensor over wide temperature range are expected.

A Thermal-Conscious Integrated Circuit Power Model and Its Impact on Dynamic Voltage Scaling Techniques

We propose a novel thermal-conscious power model for integrated circuits that can accurately predict power and temperature under voltage scaling. Experimental results show that the leakage power consumption is underestimated by 52 % if thermal effects are omitted. Furthermore, an inconsistency arises when energy and temperature are simultaneously optimized by dynamic voltage scaling. Temperature is a limiting factor for future integrated circuits,and the thermal optimization approach can attain a temperature reduction of up to 12℃ with less than 1.8% energy penalty compared with the energy optimization one.

High resolution temperature measurement technique for measuring marine heat flow

High resolution temperature measurement technique is one of the key techniques for measuring marine heat flow. Basing on Pt1000 platinum resistance which has the characteristics of high accuracy and good stability, we designed a bridge reversal excitation circuit for high resolution temperature measurement. And the deep ocean floor in-situ test results show that: (1) temperature deviation and peak-to-peak resolution of the first version circuit board (V1) are 1.960-1.990 mK and 0.980-0.995 m Kat 1.2-2.7°C, respectively; and temperature deviation and peak-to-peak resolution of the second circuit board (V2) are 2.260mK and 1.130 mK at 1.2-1.3°C, respectively; (2) During the 2012NSFC-IndOcean cruise, seafloor geothermal gradient at Ind2012HF03,-07 and-12 stations (water depth ranges from 3841 to 4541 m) were successfully measured, the values are 59.1,75.1 and 71.6°C/km, respectively. And the measurement errors of geothermal gradient at these three stations are less than 3.0% in terms of the peak-to-peak resolution. These indicate that the high resolution temperature measurement technique based on Pt1000 platinum resistance in this paper can be applied to marine heat flow measurement to obtain high precision geothermal parameters.

Test system of the front-end readout for an application-specific integrated circuit for the water Cherenkov detector array at the large high-altitude air shower observatory

The water Cherenkov detector array(WCDA) is an important part of the large high-altitude air shower observatory(LHAASO),which is in a research and development phase.The central scientific goal of LHAASO is to explore the origin of high-energy cosmic rays of the universe and to push forward the frontier of new physics.To simplify the WCDA's readout electronics,a prototype of a front-end readout for an application-specific integrated circuit(ASIC) is designed based on the timeover-threshold method to achieve charge-to-time conversion.High-precision time measurement and charge measurement are necessary over a full dynamic range[1-4000photoelectrons(P.E.)].To evaluate the performance of this ASIC,a test system is designed that includes the front-end ASIC test module,digitization module,and test software.The first module needs to be customized for different ASIC versions,whereas the digitization module and test software are tested for general-purpose use.In the digitization module,a field programmable gate array-based time-todigital converter is designed with a bin size of 333 ps,which also integrates an inter-integrated circuit to configure the ASIC test module,and a universal serial bus interface is designed to transfer data to the remote computer.Test results indicate that the time resolution is better than 0.5 ns,and the charge resolution is better than 30%root mean square(RMS) at 1 P.E.and 3%RMS at 4000 P.E.,which are beyond the application requirements.

Optimization of low-temperature alkaline smelting process of crushed metal enrichment originated from waste printed circuit boards

A novel low-temperature alkaline smelting process is proposed to convert and separate amphoteric metals in crushed metal enrichment originated from waste printed circuit boards. The central composite design was used to optimize the operating parameters,in which mass ratio of Na OH-to-CME, smelting temperature and smelting time were chosen as the variables, and the conversions of amphoteric metals tin, lead, aluminum and zinc were response parameters. Second-order polynomial models of high significance and3 D response surface plots were constructed to show the relationship between the responses and the variables. Optimum area of80%-85% Pb conversion and over 95% Sn conversion was obtained by the overlaid contours at mass ratio of Na OH-to-CME of4.5-5.0, smelting temperature of 653-723 K, smelting time of 90-120 min. The models were validated experimentally in the optimum area, and the results demonstrate that these models are reliable and accurate in predicting the smelting process.

模拟集成电路设计课程实验项目驱动式教学改革

基于高校模拟集成电路设计课程实验项目分散且教学目标不明确,缺乏系统性和工程应用性,提出了项目驱动式教学改革。以与企业合作的工程项目为基础设立实验项目,并分解成由易及难的多个实验题目,分阶段、分步骤完成实验内容,最终完成模拟集成电路设计全流程实验,以“带隙基准电压源芯片全定制设计实验”为例阐述了实施步骤。课程实验项目采用驱动式教学加深了学生对课程内容的理解,有助于培养学生扎实的工程实践能力。

Challenges to Data-Path Physical Design Inside SOC

Previously,a single data-path stack was adequate for data-path chips,and the complexity and size of the data-path was comparatively small.As current data-path chips,such as system-on-a-chip (SOC),become more complex,multiple data-path stacks are required to implement the entire data-path.As more data-path stacks are integrated into SOC,data-path is becoming a critical part of the whole giga-scale integrated circuits (GSI) design.The traditional physical design methodology can not satisfy the data-path performance requirements,because it can not accommodate the data-path bit-sliced structure and the strict performance (such as timing,coupling,and crosstalk) constraints.Challenges in the data-path physical design are addressed.The fundamental problems and key technologies in data-path physical design are analysed.The corresponding researches and solutions in this research field are also discussed.

高精度NiCr/NiSi薄膜热电偶高温测试系统

针对航空发动机涡轮叶片和燃烧室内壁等高温恶劣环境下对温度测量的迫切需求,提出了一种基于薄膜热电偶的高精度测温方法。采用磁控溅射法在SiC衬底上制备了NiCr/NiSi薄膜热电偶。完成了薄膜热电偶的设计与制备,并设计了一套高精度温度数据采集系统,主控芯片采用STM32,数据采集芯片采用16位高精度芯片ADS1118,实现了对高温恶劣环境下温度数据的实时采集。结果表明:设计制备的NiCr/NiSi薄膜热电偶能够实现-40~1000℃温度区间稳定测温,高精度测温系统与标准温度测量系统相比误差优于±0.4%,为高温恶劣环境下温度测量提供了有效且可靠的解决方法。

Design, Fabrication, and Modeling of CMOS-Compatible Double Photodiode

A double photodiode (PD) constructed by p+/N-well junction and N-well/p-sub junction was designed and fabricated in a UMC 0.18-μm CMOS process. Based on the device structure and mechanism of double PD, a novel small-signal equivalent circuit model considering the carrier transit effect and the parasitic RC time constant was presented. By this model with complete electronic components, the double PD can be incorporated in a commercial circuit simulator. The component values were extracted by fitting the measured S-parameters using simulated annealing algorithm, and a good agreement between the measurement and the simulation results was achieved. © 2017, Tianjin University and Springer-Verlag Berlin Heidelberg.

OBE 理念下“数字集成电路设计”课程教学改革

“数字集成电路设计”是微电子科学与工程专业重要的专业核心课。在课程中引入OBE教学理念,以学生毕业从事集成电路设计工作应达成的能力目标为导向,逆向设计课程教学方案。从课程理论讲授到工程项目案例教学,对学习目标达成情况进行跟踪并针对教学活动和目标持续改进,形成面向能力目标的教学效果评价体系。帮助学生独立解决科学与工程问题,锻炼了学生的工程实践能力和创新能力。

“教赛”一体“射频集成电路”研究生课程实践

针对新时代背景下研究生教育问题,以面向电子信息类相关研究生课程为对象,引入电子竞赛内容作为教学设计及工程实践,以赛促课,探索满足研究生创新能力培养模式要求的“教赛”一体研究生专业课程建设方法。以江苏大学电气信息工程学院开设的“射频集成电路”课程为例,将“研创赛”相关内容有机高效地融入课堂,在掌握理论知识的同时,有效提升研究生自主学习能力和创新实践能力。

用于小电流测量的柔性罗氏线圈设计

保障电力系统的安全运行对国家和人民至关重要。因此,须及时监测设备的性能与可靠性。其中,对设备电流的测量是相当必要的。基于罗氏线圈具有出色的线性度并且精度高,选择采用罗氏线圈作为电流传感器。但以往的线圈在测量小电流时,灵敏度低,精度低,适合对大电流的测量。针对以上问题,进行用于小电流测量的柔性线圈设计,相比刚性线圈,其轻便且安装快捷。该线圈使用硅橡胶电缆作为骨架,双层绕线增大线圈互感,有效提高了线圈的灵敏度。通过对工频电流的测量,最终灵敏度约为40mV/A,满足电力系统中的小电流测量要求,可应用于实际工程中。

FinFET/GAAFET/CFET纳电子学的研究进展

集成电路延续摩尔定律的发展正在从鳍栅场效应晶体管(FinFET)纳电子学时代向原子水平上的埃(?魡)时代转变。综述了该转变阶段的三大创新发展热点,FinFET、环栅场效应晶体管(GAAFET)和互补场效应晶体管(CFET)纳电子学的发展历程和最新进展。在FinFET纳电子领域综述并分析了当今Si基CMOS集成电路的发展现状,包含覆盖了22 nm、14 nm、10 nm、7 nm和5 nm 5个发展代次的创新特点和3 nm技术节点的创新和应用。在GAAFET纳电子学领域综述并分析了各类GAAFET的结构创新,2 nm技术节点的关键技术突破,3 nm技术节点的多桥沟道场效应晶体管技术平台创新与应用,以及GAAFET有关工艺、器件结构、电路和材料等方面的创新。在CFET纳电子学领域综述并分析了CFET技术在器件模型、堆叠工艺、单胞电路设计和三维集成等方面的创新,展现出CFET超越2 nm技术节点的发展新态势。

《集成电路版图设计》课程高职教育改革研究

本文的主要目的为分析《集成电路版图设计》课程高职教育改革的研究方式。通过分析高职集成电路版图设计课程中理念教学的改革方式,以及分析开展“1+X集成电路设计与验证”考证情况,包括分析开展高职技能大赛“集成电路开发应用”进一步提高研究质量,确保教学改革质量得到改善的状况。由此本文得出结论,当前做好《集成电路版图设计》课程高职教育改革研究能满足教学发展的需求,提高学生的学习质量。

集成结温在线监测功能的IGBT智能驱动器

结温是表征功率器件寿命的重要参数,对功率器件结温进行监测具有重要意义。基于热敏电参数法,选取对温度敏感的电参量饱和导通压降V_(CE(sat))作为研究对象,在IGBT驱动器中集成高精度结温参数测量电路,使系统可在线监测功率器件结温。同时为了得到更加精准的热-电参量对应关系,通过分段拟合的方式对IGBT模块在工作状态下结温与V_(CE(sat))的关系进行数学建模。在此基础上,还设计了相应的退饱和检测电路和分级驱动电路。经过实验验证,最终解决了传统结温测量方式工程应用性差的问题,提高了参数采集精度,将热敏电参数的结温预测误差控制在±5℃以内。