A network analyzer can often comprehend many protocols, which enables it to display talks taking place between hosts over a network. A network analyzer analyzes the device or network response and measures for the oper...A network analyzer can often comprehend many protocols, which enables it to display talks taking place between hosts over a network. A network analyzer analyzes the device or network response and measures for the operator to keep an eye on the network’s or object’s performance in an RF circuit. The purpose of the following research includes analyzing the capabilities of NetFlow analyzer to measure various parts, including filters, mixers, frequency sensitive networks, transistors, and other RF-based instruments. NetFlow Analyzer is a network traffic analyzer that measures the network parameters of electrical networks. Although there are other types of network parameter sets including Y, Z, & H-parameters, these instruments are typically employed to measure S-parameters since transmission & reflection of electrical networks are simple to calculate at high frequencies. These analyzers are widely employed to distinguish between two-port networks, including filters and amplifiers. By allowing the user to view the actual data that is sent over a network, packet by packet, a network analyzer informs you of what is happening there. Also, this research will contain the design model of NetFlow Analyzer that Measurements involving transmission and reflection use. Gain, insertion loss, and transmission coefficient are measured in transmission measurements, whereas return loss, reflection coefficient, impedance, and other variables are measured in reflection measurements. These analyzers’ operational frequencies vary from 1 Hz to 1.5 THz. These analyzers can also be used to examine stability in measurements of open loops, audio components, and ultrasonics.展开更多
In electrical circuit analysis, it is often necessary to find the set of all direct current (d.c.) operating points (either voltages or currents) of nonlinear circuits. In general, these nonlinear equations are of...In electrical circuit analysis, it is often necessary to find the set of all direct current (d.c.) operating points (either voltages or currents) of nonlinear circuits. In general, these nonlinear equations are often represented as polynomial systems. In this paper, we address the problem of finding the solutions of nonlinear electrical circuits, which are modeled as systems of n polynomial equations contained in an n-dimensional box. Branch and Bound algorithms based on interval methods can give guaranteed enclosures for the solution. However, because of repeated evaluations of the function values, these methods tend to become slower. Branch and Bound algorithm based on Bernstein coefficients can be used to solve the systems of polynomial equations. This avoids the repeated evaluation of function values, but maintains more or less the same number of iterations as that of interval branch and bound methods. We propose an algorithm for obtaining the solution of polynomial systems, which includes a pruning step using Bernstein Krawczyk operator and a Bernstein Coefficient Contraction algorithm to obtain Bernstein coefficients of the new domain. We solved three circuit analysis problems using our proposed algorithm. We compared the performance of our proposed algorithm with INTLAB based solver and found that our proposed algorithm is more efficient and fast.展开更多
In the field of high-speed circuits, the analysis of mixed circuit networks containing both distributed parameter elements and lumped parameter elements becomes ever important. This paper presents a new method for ana...In the field of high-speed circuits, the analysis of mixed circuit networks containing both distributed parameter elements and lumped parameter elements becomes ever important. This paper presents a new method for analyzing mixed circuit networks. It adds transmission line end currents to the circuit variables of the classical modified nodal approach and can be applied directly to the mixed circuit networks. We also introduce a frequency-domain technique without requiring decoupling for multiconductor transmission lines. The two methods are combined together to efficiently analyze high-speed circuit networks containing uniform,nonuniform,and frequency-dependent transmission lines. Numerical experiment is presented and the results are compared with that computed by PSPICE.展开更多
A new magnetic hydro-dynamics model for nozzle arc emphasizing the interaction of arc with PTFE (polytetrafluorethylene) vapour is established based on the conservation equations. The interruption of auto-expansion ...A new magnetic hydro-dynamics model for nozzle arc emphasizing the interaction of arc with PTFE (polytetrafluorethylene) vapour is established based on the conservation equations. The interruption of auto-expansion circuit breaker is simulated numerically by finite element method and the influence of PTFE vapour on the arc is analysed with this model. The results reveal that the flow field inside the arc chamber is determined by the arc current, the arcing time, the nozzle arc and the clogging of its thermal boundary. The establishment of quenching pressure relies on both SF6 gas and PTFE vapour that absorbed arc energy in the nozzle. The PTFE vapour leads to an increase in the pressure of nozzle arc obviously, and a decrease in the temperature of arc. But it enhances the temperature of arc at zero current and slows down the decreasing rate of arc temperature as the current decreases.展开更多
This paper reports a new three-dimensional autonomous chaotic system. It contains six control parameters and three nonlinear terms. Two cross-product terms are respectively in two equations. And one square term is in ...This paper reports a new three-dimensional autonomous chaotic system. It contains six control parameters and three nonlinear terms. Two cross-product terms are respectively in two equations. And one square term is in the third equation. Basic dynamic properties of the new system are investigated by means of theoretical analysis, numerical simulation, sensitivity to initial, power spectrum, Lyapunov exponent, and Poincar~ diagrams. The dynamic properties affected by variable parameters are also analysed. Finally, the chaotic system is simulated by circuit. The results verify the existence and implementation of the system.展开更多
In this paper, an efficient thermal analysis method is presented for large scale compound semiconductor integrated circuits based on a heterojunction bipolar transistor with considering the change of thermal conductiv...In this paper, an efficient thermal analysis method is presented for large scale compound semiconductor integrated circuits based on a heterojunction bipolar transistor with considering the change of thermal conductivity with temperature.The influence caused by the thermal conductivity can be equivalent to the increment of the local temperature surrounding the individual device. The junction temperature for each device can be efficiently calculated by the combination of the semianalytic temperature distribution function and the iteration of local temperature with high accuracy, providing a temperature distribution for a full chip. Applying this method to the InP frequency divider chip and the GaAs analog to digital converter chip, the computational results well agree with the results from the simulator COMSOL and the infrared thermal imager respectively. The proposed method can also be applied to thermal analysis in various kinds of semiconductor integrated circuits.展开更多
A new method for analyzing high-speed circuit systems is presented. The method adds transmission line end currents to the circuit variables of the classical modified nodal approach. Then the matrix equation describing...A new method for analyzing high-speed circuit systems is presented. The method adds transmission line end currents to the circuit variables of the classical modified nodal approach. Then the matrix equation describing high-speed circuit system can be formulated directly and analyzed conveniently for its normative form. A time-domain analysis method for transmission lines is also introduced. The two methods are combined together to efficiently analyze high-speed circuit systems having general transmission lines. Numerical experiment is presented and the results are compared with that calculated by Hspice.展开更多
The method and procedure of realizing parameter statistical correlation analysis ofbipolar analog IC’s are given,and the statistical model of parameter are constructed with doubleparameters(B_F,R_S).Based on the comp...The method and procedure of realizing parameter statistical correlation analysis ofbipolar analog IC’s are given,and the statistical model of parameter are constructed with doubleparameters(B_F,R_S).Based on the comparison and analysis of the circuit characteristics,it isshown that the method can be used for analysis and design of bipolar IC’s.展开更多
A new transient analysis method for the transmission line circuits is presented in this paper. Based on the semidiscretization of the telegraph equations, a discretized time domain companion models for the transmissio...A new transient analysis method for the transmission line circuits is presented in this paper. Based on the semidiscretization of the telegraph equations, a discretized time domain companion models for the transmission lines which can be conveniently implemented in a general circuit simulator such as SPICE is derived. The computation required for the model is linear with time, equivalent to the recursive convolution-based method. The formulations for both single and coupled lossy transmission lines are given. Numerical experiments are carried out to demonstrate the validity of the method.展开更多
This paper uses canonical piecewise-linear analysis method to analyze nonlinear DC fault circuitsand solve for the values of the test port voltages which are selected beforehand .The method needs lessmemory storages,o...This paper uses canonical piecewise-linear analysis method to analyze nonlinear DC fault circuitsand solve for the values of the test port voltages which are selected beforehand .The method needs lessmemory storages,obtains the results in finite steps and has high efficiency in computation.It can be appliedto the circuits containing multiport nonlinear elements.It is a good method of pre-test analysis for fault cir-cuits in simulation-before-test aproach in analogue circuit diagnosis.展开更多
This paper presents an analysis method, based on MacCormack's technique, for the evaluation of the time domain sensitivity of distributed parameter elements in high-speed circuit networks. Sensitivities can be calcul...This paper presents an analysis method, based on MacCormack's technique, for the evaluation of the time domain sensitivity of distributed parameter elements in high-speed circuit networks. Sensitivities can be calculated from electrical and physical parameters of the distributed parameter elements. The proposed method is a direct numerical method of time-space discretization and does not require complicated mathematical deductive process. Therefore, it is very convenient to program this method. It can be applied to sensitivity analysis of general transmission lines in linear or nonlinear circuit networks. The proposed method is second-order-accurate. Numerical experiment is presented to demonstrate its accuracy and efficiency.展开更多
In this study,the deformation and stress distribution of printed circuit board(PCB)with different thickness and composite materials under a shock loading were analyzed by the finite element analysis.The standard 8-lay...In this study,the deformation and stress distribution of printed circuit board(PCB)with different thickness and composite materials under a shock loading were analyzed by the finite element analysis.The standard 8-layer PCB subjected to a shock loading 1500 g was evaluated first.Moreover,the finite element models of the PCB with different thickness by stacking various number of layers were discussed.In addition to changing thickness,the core material of PCB was replaced from woven E-glass/epoxy to woven carbon fiber/epoxy for structural enhancement.The non-linear material property of copper foil was considered in the analysis.The results indicated that a thicker PCB has lower stress in the copper foil in PCBs under the shock loading.The stress difference between the thicker PCB(2.6 mm)and thinner PCB(0.6 mm)is around 5%.Using woven carbon fiber/epoxy as core material could lower the stress of copper foil around 6.6%under the shock loading 1500 g for the PCB with 0.6 mm thickness.On the other hand,the stress level is under the failure strength of PCBs with carbon fiber/epoxy core layers and thickness 2.6 mm when the peak acceleration changes from 1500 g to 5000 g.This study could provide a reference for the design and proper applications of the PCB with different thickness and composite materials.展开更多
Monte Carlo Analysis has been an accepted method for circuit tolerance analysis, but the heavy computational complexity has always prevented its applications. Based on random set theory, this paper presents a simple a...Monte Carlo Analysis has been an accepted method for circuit tolerance analysis, but the heavy computational complexity has always prevented its applications. Based on random set theory, this paper presents a simple and flexible tolerance analysis method to estimate circuit yield. It is the alternative to Monte Carlo analysis, but reduces the number of calculations dramatically.展开更多
The development and the revolution of nanotechnology require more and effective methods to accurately estimating the timing analysis for any CMOS transistor level circuit. Many researches attempted to resolve the timi...The development and the revolution of nanotechnology require more and effective methods to accurately estimating the timing analysis for any CMOS transistor level circuit. Many researches attempted to resolve the timing analysis, but the best method found till the moment is the Static Timing Analysis (STA). It is considered the best solution because of its accuracy and fast run time. Transistor level models are mandatory required for the best estimating methods, since these take into consideration all analysis scenarios to overcome problems of multiple-input switching, false paths and high stacks that are found in classic CMOS gates. In this paper, transistor level graph model is proposed to describe the behavior of CMOS circuits under predictive Nanotechnology SPICE parameters. This model represents the transistor in the CMOS circuit as nodes in the graph regardless of its positions in the gates to accurately estimating the timing analysis rather than inaccurate estimating which caused by the false paths at the gate level. Accurate static timing analysis is estimated using the model proposed in this paper. Building on the proposed model and the graph theory concepts, new algorithms are proposed and simulated to compute transistor timing analysis using RC model. Simulation results show the validity of the proposed graph model and its algorithms by using predictive Nano-Technology SPICE parameters for the tested technology. An important and effective extension has been achieved in this paper for a one that was published in international conference.展开更多
The analysis of circuits is frequently required in the electricity of physics. When analyzing circuits, the general idea is to study the issues related to nonlinear resistance circuits based on commonly used physical ...The analysis of circuits is frequently required in the electricity of physics. When analyzing circuits, the general idea is to study the issues related to nonlinear resistance circuits based on commonly used physical and electrical theory. Generally, circuits can be divided into linear resistance circuits and nonlinear resistance circuits. However, for some nonlinear resistance circuit, a small part of them are decomposed through subsection linearity while most of them are adopted the form of hieroglyph combination for subsection decomposition fitting analysis. For the following contents, the author will adopt curve layout method to analyze nonlinear resistance element and relation characteristics of voltage and current;to state the characteristics and nature of common electronic elements in our life, and concepts of concave resistance and convex resistance;to analyze the characteristics of nonlinear resistance circuits through electrical circuit analysis method based on the electrical theorem of physics;finally, to analyze referring to actual cases, study the veracity, verify the feasibility and scientificity of the adopted analytical approach, apply image graphics of the resistance circuits in the convenient way to solve complicated design problems among actual electrical problems.展开更多
The electrostatic discharge(ESD)phenomenon is very common,in daily life,many places will appear ESD phenomenon.However,ESD is a potential hazard for integrated circuits.This paper analyzes the ESD protection design an...The electrostatic discharge(ESD)phenomenon is very common,in daily life,many places will appear ESD phenomenon.However,ESD is a potential hazard for integrated circuits.This paper analyzes the ESD protection design and characteristics of advanced process integrated circuits,and puts forward personal views combined with experience,hoping to bring help to the people who pay attention to the ESD protection of integrated circuits.展开更多
It is estimated that there is a generation of 307,224 ton/year [1] of waste from electronic and electronic equipment (WEEE) in Mexico, of which 10% is recycled, 40% remains stored and 50% reaches landfills or uncontro...It is estimated that there is a generation of 307,224 ton/year [1] of waste from electronic and electronic equipment (WEEE) in Mexico, of which 10% is recycled, 40% remains stored and 50% reaches landfills or uncontrolled dumps. In the practice, even the regulatory instruments are not consolidated and the adequate management of the use of WEEE management, so the aim of this study is an analysis of life cycle of printed circuit boards (TCI) to identify the management alternatives that represent the least impact to the environment. This assessment was carried out using software SIMAPRO to determine the environmental impact of each scenario, through the comparison of impacts and the proposed improvements to reduce it, following phases of this methodology by applying standards, ISO 14040/ISO 14044 [2], using data from the INE official reports since 2006 until 2010 which concentrate the information of the WEEE problem in Mexico. These data were pooled to carry out inventories according to the availability in the information, identifying the environmental impacts generated by processing. The conclusions of the LCA will serve to identify the stage with greater environmental impact, and thus propose ideas for improvement in order to minimize this impact.展开更多
Symbolic analysis has many applications in the design of analog circuits. Existing approaches rely on two forms of symbolic-expression representation: expanded sum-of-product form and arbitrarily nested form. Expanded...Symbolic analysis has many applications in the design of analog circuits. Existing approaches rely on two forms of symbolic-expression representation: expanded sum-of-product form and arbitrarily nested form. Expanded form suffers the problem that the number of product terms grows exponentially with the size of a circuit. Nested form is neither canonical nor amenable to symbolic manipulation. In this paper, we present a new approach to exact and canonical symbolic analysis by exploiting the sparsity and sharing of product terms. This algorithm, called totally coded method (TCM), consists of representing the symbolic determinant of a circuit matrix by code series and performing symbolic analysis by code manipulation. We describe an efficient code-ordering heuristic and prove that it is optimum for ladder-structured circuits. For practical analog circuits, TCM not only covers all advantages of the algorithm via determinant decision diagrams (DDD) but is more simple and efficient than DDD method.展开更多
文摘A network analyzer can often comprehend many protocols, which enables it to display talks taking place between hosts over a network. A network analyzer analyzes the device or network response and measures for the operator to keep an eye on the network’s or object’s performance in an RF circuit. The purpose of the following research includes analyzing the capabilities of NetFlow analyzer to measure various parts, including filters, mixers, frequency sensitive networks, transistors, and other RF-based instruments. NetFlow Analyzer is a network traffic analyzer that measures the network parameters of electrical networks. Although there are other types of network parameter sets including Y, Z, & H-parameters, these instruments are typically employed to measure S-parameters since transmission & reflection of electrical networks are simple to calculate at high frequencies. These analyzers are widely employed to distinguish between two-port networks, including filters and amplifiers. By allowing the user to view the actual data that is sent over a network, packet by packet, a network analyzer informs you of what is happening there. Also, this research will contain the design model of NetFlow Analyzer that Measurements involving transmission and reflection use. Gain, insertion loss, and transmission coefficient are measured in transmission measurements, whereas return loss, reflection coefficient, impedance, and other variables are measured in reflection measurements. These analyzers’ operational frequencies vary from 1 Hz to 1.5 THz. These analyzers can also be used to examine stability in measurements of open loops, audio components, and ultrasonics.
文摘In electrical circuit analysis, it is often necessary to find the set of all direct current (d.c.) operating points (either voltages or currents) of nonlinear circuits. In general, these nonlinear equations are often represented as polynomial systems. In this paper, we address the problem of finding the solutions of nonlinear electrical circuits, which are modeled as systems of n polynomial equations contained in an n-dimensional box. Branch and Bound algorithms based on interval methods can give guaranteed enclosures for the solution. However, because of repeated evaluations of the function values, these methods tend to become slower. Branch and Bound algorithm based on Bernstein coefficients can be used to solve the systems of polynomial equations. This avoids the repeated evaluation of function values, but maintains more or less the same number of iterations as that of interval branch and bound methods. We propose an algorithm for obtaining the solution of polynomial systems, which includes a pruning step using Bernstein Krawczyk operator and a Bernstein Coefficient Contraction algorithm to obtain Bernstein coefficients of the new domain. We solved three circuit analysis problems using our proposed algorithm. We compared the performance of our proposed algorithm with INTLAB based solver and found that our proposed algorithm is more efficient and fast.
文摘In the field of high-speed circuits, the analysis of mixed circuit networks containing both distributed parameter elements and lumped parameter elements becomes ever important. This paper presents a new method for analyzing mixed circuit networks. It adds transmission line end currents to the circuit variables of the classical modified nodal approach and can be applied directly to the mixed circuit networks. We also introduce a frequency-domain technique without requiring decoupling for multiconductor transmission lines. The two methods are combined together to efficiently analyze high-speed circuit networks containing uniform,nonuniform,and frequency-dependent transmission lines. Numerical experiment is presented and the results are compared with that computed by PSPICE.
文摘A new magnetic hydro-dynamics model for nozzle arc emphasizing the interaction of arc with PTFE (polytetrafluorethylene) vapour is established based on the conservation equations. The interruption of auto-expansion circuit breaker is simulated numerically by finite element method and the influence of PTFE vapour on the arc is analysed with this model. The results reveal that the flow field inside the arc chamber is determined by the arc current, the arcing time, the nozzle arc and the clogging of its thermal boundary. The establishment of quenching pressure relies on both SF6 gas and PTFE vapour that absorbed arc energy in the nozzle. The PTFE vapour leads to an increase in the pressure of nozzle arc obviously, and a decrease in the temperature of arc. But it enhances the temperature of arc at zero current and slows down the decreasing rate of arc temperature as the current decreases.
文摘This paper reports a new three-dimensional autonomous chaotic system. It contains six control parameters and three nonlinear terms. Two cross-product terms are respectively in two equations. And one square term is in the third equation. Basic dynamic properties of the new system are investigated by means of theoretical analysis, numerical simulation, sensitivity to initial, power spectrum, Lyapunov exponent, and Poincar~ diagrams. The dynamic properties affected by variable parameters are also analysed. Finally, the chaotic system is simulated by circuit. The results verify the existence and implementation of the system.
基金Project supported by the Advance Research Foundation of China(Grant No.9140Axxx501)the National Defense Advance Research Project,China(Grant No.3151xxxx301)+1 种基金the Frontier Innovation Program,China(Grant No.48xx4)the 111 Project,China(Grant No.B12026)
文摘In this paper, an efficient thermal analysis method is presented for large scale compound semiconductor integrated circuits based on a heterojunction bipolar transistor with considering the change of thermal conductivity with temperature.The influence caused by the thermal conductivity can be equivalent to the increment of the local temperature surrounding the individual device. The junction temperature for each device can be efficiently calculated by the combination of the semianalytic temperature distribution function and the iteration of local temperature with high accuracy, providing a temperature distribution for a full chip. Applying this method to the InP frequency divider chip and the GaAs analog to digital converter chip, the computational results well agree with the results from the simulator COMSOL and the infrared thermal imager respectively. The proposed method can also be applied to thermal analysis in various kinds of semiconductor integrated circuits.
文摘A new method for analyzing high-speed circuit systems is presented. The method adds transmission line end currents to the circuit variables of the classical modified nodal approach. Then the matrix equation describing high-speed circuit system can be formulated directly and analyzed conveniently for its normative form. A time-domain analysis method for transmission lines is also introduced. The two methods are combined together to efficiently analyze high-speed circuit systems having general transmission lines. Numerical experiment is presented and the results are compared with that calculated by Hspice.
文摘The method and procedure of realizing parameter statistical correlation analysis ofbipolar analog IC’s are given,and the statistical model of parameter are constructed with doubleparameters(B_F,R_S).Based on the comparison and analysis of the circuit characteristics,it isshown that the method can be used for analysis and design of bipolar IC’s.
文摘A new transient analysis method for the transmission line circuits is presented in this paper. Based on the semidiscretization of the telegraph equations, a discretized time domain companion models for the transmission lines which can be conveniently implemented in a general circuit simulator such as SPICE is derived. The computation required for the model is linear with time, equivalent to the recursive convolution-based method. The formulations for both single and coupled lossy transmission lines are given. Numerical experiments are carried out to demonstrate the validity of the method.
文摘This paper uses canonical piecewise-linear analysis method to analyze nonlinear DC fault circuitsand solve for the values of the test port voltages which are selected beforehand .The method needs lessmemory storages,obtains the results in finite steps and has high efficiency in computation.It can be appliedto the circuits containing multiport nonlinear elements.It is a good method of pre-test analysis for fault cir-cuits in simulation-before-test aproach in analogue circuit diagnosis.
文摘This paper presents an analysis method, based on MacCormack's technique, for the evaluation of the time domain sensitivity of distributed parameter elements in high-speed circuit networks. Sensitivities can be calculated from electrical and physical parameters of the distributed parameter elements. The proposed method is a direct numerical method of time-space discretization and does not require complicated mathematical deductive process. Therefore, it is very convenient to program this method. It can be applied to sensitivity analysis of general transmission lines in linear or nonlinear circuit networks. The proposed method is second-order-accurate. Numerical experiment is presented to demonstrate its accuracy and efficiency.
基金the support from Ministry of Science and Technology,Taiwan,R.O.C.,through grant MOST-105-2221-E-007-031-MY3.
文摘In this study,the deformation and stress distribution of printed circuit board(PCB)with different thickness and composite materials under a shock loading were analyzed by the finite element analysis.The standard 8-layer PCB subjected to a shock loading 1500 g was evaluated first.Moreover,the finite element models of the PCB with different thickness by stacking various number of layers were discussed.In addition to changing thickness,the core material of PCB was replaced from woven E-glass/epoxy to woven carbon fiber/epoxy for structural enhancement.The non-linear material property of copper foil was considered in the analysis.The results indicated that a thicker PCB has lower stress in the copper foil in PCBs under the shock loading.The stress difference between the thicker PCB(2.6 mm)and thinner PCB(0.6 mm)is around 5%.Using woven carbon fiber/epoxy as core material could lower the stress of copper foil around 6.6%under the shock loading 1500 g for the PCB with 0.6 mm thickness.On the other hand,the stress level is under the failure strength of PCBs with carbon fiber/epoxy core layers and thickness 2.6 mm when the peak acceleration changes from 1500 g to 5000 g.This study could provide a reference for the design and proper applications of the PCB with different thickness and composite materials.
基金the National Natural Science Foundation of China (No.60772006, 60434020)the Zhejiang Natural Science Foundation (No.R106745, Y1080422).
文摘Monte Carlo Analysis has been an accepted method for circuit tolerance analysis, but the heavy computational complexity has always prevented its applications. Based on random set theory, this paper presents a simple and flexible tolerance analysis method to estimate circuit yield. It is the alternative to Monte Carlo analysis, but reduces the number of calculations dramatically.
文摘The development and the revolution of nanotechnology require more and effective methods to accurately estimating the timing analysis for any CMOS transistor level circuit. Many researches attempted to resolve the timing analysis, but the best method found till the moment is the Static Timing Analysis (STA). It is considered the best solution because of its accuracy and fast run time. Transistor level models are mandatory required for the best estimating methods, since these take into consideration all analysis scenarios to overcome problems of multiple-input switching, false paths and high stacks that are found in classic CMOS gates. In this paper, transistor level graph model is proposed to describe the behavior of CMOS circuits under predictive Nanotechnology SPICE parameters. This model represents the transistor in the CMOS circuit as nodes in the graph regardless of its positions in the gates to accurately estimating the timing analysis rather than inaccurate estimating which caused by the false paths at the gate level. Accurate static timing analysis is estimated using the model proposed in this paper. Building on the proposed model and the graph theory concepts, new algorithms are proposed and simulated to compute transistor timing analysis using RC model. Simulation results show the validity of the proposed graph model and its algorithms by using predictive Nano-Technology SPICE parameters for the tested technology. An important and effective extension has been achieved in this paper for a one that was published in international conference.
文摘The analysis of circuits is frequently required in the electricity of physics. When analyzing circuits, the general idea is to study the issues related to nonlinear resistance circuits based on commonly used physical and electrical theory. Generally, circuits can be divided into linear resistance circuits and nonlinear resistance circuits. However, for some nonlinear resistance circuit, a small part of them are decomposed through subsection linearity while most of them are adopted the form of hieroglyph combination for subsection decomposition fitting analysis. For the following contents, the author will adopt curve layout method to analyze nonlinear resistance element and relation characteristics of voltage and current;to state the characteristics and nature of common electronic elements in our life, and concepts of concave resistance and convex resistance;to analyze the characteristics of nonlinear resistance circuits through electrical circuit analysis method based on the electrical theorem of physics;finally, to analyze referring to actual cases, study the veracity, verify the feasibility and scientificity of the adopted analytical approach, apply image graphics of the resistance circuits in the convenient way to solve complicated design problems among actual electrical problems.
文摘The electrostatic discharge(ESD)phenomenon is very common,in daily life,many places will appear ESD phenomenon.However,ESD is a potential hazard for integrated circuits.This paper analyzes the ESD protection design and characteristics of advanced process integrated circuits,and puts forward personal views combined with experience,hoping to bring help to the people who pay attention to the ESD protection of integrated circuits.
文摘It is estimated that there is a generation of 307,224 ton/year [1] of waste from electronic and electronic equipment (WEEE) in Mexico, of which 10% is recycled, 40% remains stored and 50% reaches landfills or uncontrolled dumps. In the practice, even the regulatory instruments are not consolidated and the adequate management of the use of WEEE management, so the aim of this study is an analysis of life cycle of printed circuit boards (TCI) to identify the management alternatives that represent the least impact to the environment. This assessment was carried out using software SIMAPRO to determine the environmental impact of each scenario, through the comparison of impacts and the proposed improvements to reduce it, following phases of this methodology by applying standards, ISO 14040/ISO 14044 [2], using data from the INE official reports since 2006 until 2010 which concentrate the information of the WEEE problem in Mexico. These data were pooled to carry out inventories according to the availability in the information, identifying the environmental impacts generated by processing. The conclusions of the LCA will serve to identify the stage with greater environmental impact, and thus propose ideas for improvement in order to minimize this impact.
文摘Symbolic analysis has many applications in the design of analog circuits. Existing approaches rely on two forms of symbolic-expression representation: expanded sum-of-product form and arbitrarily nested form. Expanded form suffers the problem that the number of product terms grows exponentially with the size of a circuit. Nested form is neither canonical nor amenable to symbolic manipulation. In this paper, we present a new approach to exact and canonical symbolic analysis by exploiting the sparsity and sharing of product terms. This algorithm, called totally coded method (TCM), consists of representing the symbolic determinant of a circuit matrix by code series and performing symbolic analysis by code manipulation. We describe an efficient code-ordering heuristic and prove that it is optimum for ladder-structured circuits. For practical analog circuits, TCM not only covers all advantages of the algorithm via determinant decision diagrams (DDD) but is more simple and efficient than DDD method.