Given the substantially increasing complexity of embedded systems, the use of relatively detailed clock cycle-accurate simulators for the design-space exploration is impractical in the early design stages. Raising the...Given the substantially increasing complexity of embedded systems, the use of relatively detailed clock cycle-accurate simulators for the design-space exploration is impractical in the early design stages. Raising the abstraction level is nowadays widely seen as a solution to bridge the gap between the increasing system complexity and the low design productivity. For this, several system-level design tools and methodologies have been introduced to efficiently explore the design space of heterogeneous signal processing systems. In this paper, we demonstrate the effectiveness and the flexibility of the Sesame/Artemis system-level modeling and simulation methodology for efficient peformance evaluation and rapid architectural exploration of the increasing complexity heterogeneous embedded media systems. For this purpose, we have selected a system level design of a very high complexity media application;a H.264/AVC (Advanced Video Codec) video encoder. The encoding performances will be evaluated using system-level simulations targeting multiple heterogeneous multiprocessors platforms.展开更多
The unique features of jointed post-tensioned wall systems, which include minimum structural damage and re-centering capability when subjected to earthquake lateral loads, are the result of using unbonded post-tension...The unique features of jointed post-tensioned wall systems, which include minimum structural damage and re-centering capability when subjected to earthquake lateral loads, are the result of using unbonded post-tensioning to attach the walls to the foundation, along with employing energy dissipating shear connectors between the walls. Using acceptance criteria defined in terms of inter-story drift, residual drift, and floor acceleration, this study presents a multiplelevel performance-based seismic evaluation of two five-story unbonded post-tensioned jointed precast wall systems. The design and analysis of these two wall systems, established as the direct displacement-based and force-based solutions for a prototype building used in the PREcast Seismic Structural Systems （PRESSS） program, were performed at 60% scale so that the analysis model could be validated using the PRESSS test data. Both buildings satisfied the performance criteria at four levels of earthquake motions although the design base shear of the direct displacement-based jointed wall system was 50% of that demanded by the force-based design method. The study also investigated the feasibility of controlling the maximum transient inter-story drift in a jointed wall system by increasing the number of energy dissipating shear connectors between the walls but without significantly affecting its re-centering capability.展开更多
In response to the inadaptation and difficulties for architects in the use of engineering simulation tools and optimization methods,a method is proposed for graphical performance evaluation achieved with a developed p...In response to the inadaptation and difficulties for architects in the use of engineering simulation tools and optimization methods,a method is proposed for graphical performance evaluation achieved with a developed plugin for Grasshopper as an architect-friendly tool to support design exploration in early stage.The proposed method follows forward work-flow for interactive feedback of performance,focusing on thermal and visual comfort upon a variety of design options.A case study of shading design is demonstrated.The demonstration illustrated an intuitive and graphical process for qualitative performance evaluation,which is assisted by an overall ratio ranking the integrated performance of design options for a quantitative comparison.Compared with engineering optimization methods that focus on optimal performance-based solutions,the proposed method presented graphical feedbacks on design performance that are interactive with the designer for performance-informed decision making.In this way,the proposed method stimulates the effective and positive application of engineering tools and judgment at the early stage of iterative design.展开更多
Network processors are used in the core node of network to flexibly process packet streams. With the increase of performance, the power of network processor increases fast, and power and cooling become a bottleneck. A...Network processors are used in the core node of network to flexibly process packet streams. With the increase of performance, the power of network processor increases fast, and power and cooling become a bottleneck. Architecture-level power conscious design must go beyond low-level circuit design. Architectural power and performance tradeoff should be considered at the same time. Simulation is an efficient method to design modem network processor before making chip. In order to achieve the tradeoff between performance and power, the processor simulator is used to design the architecture of network processor. Using Netbeneh, Commubench benchmark and processor simulator-SimpleScalar, the performance and power of network processor are quantitatively evaluated. New performance tradeoff evaluation metric is proposed to analyze the architecture of network processor. Based on the high performance lnteI IXP 2800 Network processor eonfignration, optimized instruction fetch width and speed ,instruction issue width, instruction window size are analyzed and selected. Simulation resuits show that the tradeoff design method makes the usage of network processor more effectively. The optimal key parameters of network processor are important in architecture-level design. It is meaningful for the next generation network processor design.展开更多
文摘Given the substantially increasing complexity of embedded systems, the use of relatively detailed clock cycle-accurate simulators for the design-space exploration is impractical in the early design stages. Raising the abstraction level is nowadays widely seen as a solution to bridge the gap between the increasing system complexity and the low design productivity. For this, several system-level design tools and methodologies have been introduced to efficiently explore the design space of heterogeneous signal processing systems. In this paper, we demonstrate the effectiveness and the flexibility of the Sesame/Artemis system-level modeling and simulation methodology for efficient peformance evaluation and rapid architectural exploration of the increasing complexity heterogeneous embedded media systems. For this purpose, we have selected a system level design of a very high complexity media application;a H.264/AVC (Advanced Video Codec) video encoder. The encoding performances will be evaluated using system-level simulations targeting multiple heterogeneous multiprocessors platforms.
文摘The unique features of jointed post-tensioned wall systems, which include minimum structural damage and re-centering capability when subjected to earthquake lateral loads, are the result of using unbonded post-tensioning to attach the walls to the foundation, along with employing energy dissipating shear connectors between the walls. Using acceptance criteria defined in terms of inter-story drift, residual drift, and floor acceleration, this study presents a multiplelevel performance-based seismic evaluation of two five-story unbonded post-tensioned jointed precast wall systems. The design and analysis of these two wall systems, established as the direct displacement-based and force-based solutions for a prototype building used in the PREcast Seismic Structural Systems （PRESSS） program, were performed at 60% scale so that the analysis model could be validated using the PRESSS test data. Both buildings satisfied the performance criteria at four levels of earthquake motions although the design base shear of the direct displacement-based jointed wall system was 50% of that demanded by the force-based design method. The study also investigated the feasibility of controlling the maximum transient inter-story drift in a jointed wall system by increasing the number of energy dissipating shear connectors between the walls but without significantly affecting its re-centering capability.
基金The first author would like to acknowledge the grant of the Top Youth Programme of Wuhan University that made this work possible。
文摘In response to the inadaptation and difficulties for architects in the use of engineering simulation tools and optimization methods,a method is proposed for graphical performance evaluation achieved with a developed plugin for Grasshopper as an architect-friendly tool to support design exploration in early stage.The proposed method follows forward work-flow for interactive feedback of performance,focusing on thermal and visual comfort upon a variety of design options.A case study of shading design is demonstrated.The demonstration illustrated an intuitive and graphical process for qualitative performance evaluation,which is assisted by an overall ratio ranking the integrated performance of design options for a quantitative comparison.Compared with engineering optimization methods that focus on optimal performance-based solutions,the proposed method presented graphical feedbacks on design performance that are interactive with the designer for performance-informed decision making.In this way,the proposed method stimulates the effective and positive application of engineering tools and judgment at the early stage of iterative design.
基金Sponsored by the National Defence Research Foundation of China(Grant No.413460303).
文摘Network processors are used in the core node of network to flexibly process packet streams. With the increase of performance, the power of network processor increases fast, and power and cooling become a bottleneck. Architecture-level power conscious design must go beyond low-level circuit design. Architectural power and performance tradeoff should be considered at the same time. Simulation is an efficient method to design modem network processor before making chip. In order to achieve the tradeoff between performance and power, the processor simulator is used to design the architecture of network processor. Using Netbeneh, Commubench benchmark and processor simulator-SimpleScalar, the performance and power of network processor are quantitatively evaluated. New performance tradeoff evaluation metric is proposed to analyze the architecture of network processor. Based on the high performance lnteI IXP 2800 Network processor eonfignration, optimized instruction fetch width and speed ,instruction issue width, instruction window size are analyzed and selected. Simulation resuits show that the tradeoff design method makes the usage of network processor more effectively. The optimal key parameters of network processor are important in architecture-level design. It is meaningful for the next generation network processor design.
