To prevent sub-harmonic oscillation and improve the stability and load capacity of the system,a piecewise linear slope compensation circuit is designed. Compared with the traditional design, this circuit provides a co...To prevent sub-harmonic oscillation and improve the stability and load capacity of the system,a piecewise linear slope compensation circuit is designed. Compared with the traditional design, this circuit provides a compensation signal whose slope varies from different duty cycles at - 40-85℃ ,and reduces the negative effect of slope compensation on the system＇s load capacity and transient response. A current mode PWM Boost DC-DC converter employing this slope compensation circuit is implemented in a UMC 0.6μm-BCD process. The results indicate that the circuit works well and effectively,and the load capacity is increased by 20%. The chip area of the piecewise linear slope compensation circuit is 0.01mm^2 ,which consumes only 8μA quiescent current,and the efficiency ranges up to 93%.展开更多
By establishing the discrete iterative mapping model of a current mode controlled buck-boost converter, this paper studies the mechanism of mode shift and stability control of the buck-boost converter operating in dis...By establishing the discrete iterative mapping model of a current mode controlled buck-boost converter, this paper studies the mechanism of mode shift and stability control of the buck-boost converter operating in discontinuous conduction mode with a ramp compensation current. With the bifurcation diagrazn, Lyapunov exponent spectrum, time- domain waveform and parameter space map, the performance of the buck-boost converter circuit utilizing a compensating ramp current has been analysed. The obtained results indicate that the system trajectory is weakly chaotic and strongly intermittent under discontinuous conduction mode. By using ramp compensation, the buck-boost converter can shift from discontinuous conduction mode to continuous conduction mode, and effectively operates in the stable period-one region.展开更多
The discrete iterative map models of peak current-mode （PCM） and valley current-mode （VCM） controlled buck converters, boost converters, and buck-boost converters with ramp compensation are established and their d...The discrete iterative map models of peak current-mode （PCM） and valley current-mode （VCM） controlled buck converters, boost converters, and buck-boost converters with ramp compensation are established and their dynamical behaviours are investigated by using the operation region, parameter space map, bifurcation diagram, and Lyapunov exponent spectrum. The research results indicate that ramp compensation extends the stable operation range of the PCM controlled switching dc-dc converter to D 〉 0.5 and that of the VCM controlled switching dc-dc converter to D 〈 0.5. Compared with PCM controlled switching dc-dc converters with ramp compensation, VCM controlled switching dc-dc converters with ramp compensation exhibit interesting symmetrical dynamics. Experimental results are given to verify the analysis results in this paper.展开更多
A novel software implementation for current polarity detection and current compensation is presented. For a three-phase zero-voltage soft-switching （ZVS） PWM converter based on phase and amplitude control （PAC）, w...A novel software implementation for current polarity detection and current compensation is presented. For a three-phase zero-voltage soft-switching （ZVS） PWM converter based on phase and amplitude control （PAC）, when saw-tooth carriers with alternate positive and negative slopes are adopted, the positive or negative slopes are chosen according to the phase current polarity. Since polarity reversal causes current distortion, current at the instant of reversal should be compensated for. Based on the characteristic of unity power factor converter in rectification and regeneration modes, a software implementation for current polarity detection is proposed. Distortion of current zero-crossing caused by using saw-tooth carriers with alternate positive and negative slopes is analyzed, and the relevant compensation method is proposed. Experimental study with a 1.5 kW device shows that phase current has a small harmonic content and power factor is high both in rectification and regeneration modes.展开更多
A current-mode DC-DC buck converter with high stability is presented. The loop gain＇s expression of the current-mode converter is derived by employing an advanced model of a current-mode control converter. After anal...A current-mode DC-DC buck converter with high stability is presented. The loop gain＇s expression of the current-mode converter is derived by employing an advanced model of a current-mode control converter. After analyzing the loop gain＇s expression, which illustrates the method of selecting suitable frequency compensation for the control loop,a novel pole-zero tracking frequency compensation is proposed. Based on theoretical analysis, a DC-DC buck converter with high stability is designed with 0.5μm-CMOS technology. The simulated results reveal that the stability of the converter is independent of the load current and the input voltage. Moreover,the converter provides a full load transient response setting time of less than 5μs and overshoots and undershoots of less than 30mV.展开更多
The discrete iterative map model of peak current-mode controlled buck converter with constant current load（CCL）,containing the output voltage feedback and ramp compensation, is established in this paper. Based on th...The discrete iterative map model of peak current-mode controlled buck converter with constant current load（CCL）,containing the output voltage feedback and ramp compensation, is established in this paper. Based on this model the complex dynamics of this converter is investigated by analyzing bifurcation diagrams and the Lyapunov exponent spectrum. The effects of ramp compensation and output voltage feedback on the stability of the converter are investigated. Experimental results verify the simulation and theoretical analysis. The stability boundary and chaos boundary are obtained under the theoretical conditions of period-doubling bifurcation and border collision. It is found that there are four operation regions in the peak current-mode controlled buck converter with CCL due to period-doubling bifurcation and border-collision bifurcation. Research results indicate that ramp compensation can extend the stable operation range and transfer the operating mode, and output voltage feedback can eventually eliminate the coexisting fast-slow scale instability.展开更多
In order to improve the Power Quality(PQ)of traction power supply system and reduce the power rating and operation cost of compensator,a Static VAR Compensator(SVC)integrated Railway Power Conditioner(RPC)is presented...In order to improve the Power Quality(PQ)of traction power supply system and reduce the power rating and operation cost of compensator,a Static VAR Compensator(SVC)integrated Railway Power Conditioner(RPC)is presented in this paper.RPC is a widely used device in the AC electrified railway systems to enhance the PQ indices of the main network.The next generation of this equipment is Active Power Quality Compensator(APQC).The major concern of these compensators is their high kVA rating.In this paper,a hybrid technique is proposed to solve aforementioned problems.A combination of SVC as an auxiliary device is employed together with the main compensators,i.e.,RPC and APQC that leads on to the reduction of power rating of the main compensators.The use of proposed scheme will cause to reduce significantly the initial investment cost of compensation system.The main compensators are only utilized to balance active powers of two adjacent feeder sections and suppress harmonic currents.The SVCs are used to compensate reactive power and suppress the third and fifth harmonic currents.In this paper firstly,the PQ compensation procedure in AC electrified railway is analyzed step by step.Then,the control strategies for SVC and the main compensators are presented.Finally,a simulation is fulfilled using Matlab/Simulink software to verify the effectiveness and validity of the proposed scheme and compensation strategy and also demonstrate that this technique could compensate all PQ problems.展开更多
文摘To prevent sub-harmonic oscillation and improve the stability and load capacity of the system,a piecewise linear slope compensation circuit is designed. Compared with the traditional design, this circuit provides a compensation signal whose slope varies from different duty cycles at - 40-85℃ ,and reduces the negative effect of slope compensation on the system＇s load capacity and transient response. A current mode PWM Boost DC-DC converter employing this slope compensation circuit is implemented in a UMC 0.6μm-BCD process. The results indicate that the circuit works well and effectively,and the load capacity is increased by 20%. The chip area of the piecewise linear slope compensation circuit is 0.01mm^2 ,which consumes only 8μA quiescent current,and the efficiency ranges up to 93%.
基金Project supported by the National Natural Science Foundations of China (Grant Nos 50677056 and 60472059)
文摘By establishing the discrete iterative mapping model of a current mode controlled buck-boost converter, this paper studies the mechanism of mode shift and stability control of the buck-boost converter operating in discontinuous conduction mode with a ramp compensation current. With the bifurcation diagrazn, Lyapunov exponent spectrum, time- domain waveform and parameter space map, the performance of the buck-boost converter circuit utilizing a compensating ramp current has been analysed. The obtained results indicate that the system trajectory is weakly chaotic and strongly intermittent under discontinuous conduction mode. By using ramp compensation, the buck-boost converter can shift from discontinuous conduction mode to continuous conduction mode, and effectively operates in the stable period-one region.
基金Project supported by the National Natural Science Foundation of China (Grant No.50677056)the Natural Science Foundation of Jiangsu Province,China (Grant No.BK2009105)+1 种基金the Cultivation Project of Excellent Doctorate Dissertation of Southwest Jiaotong University,Chinathe Doctoral Innovation Foundation of Southwest Jiaotong University,China
文摘The discrete iterative map models of peak current-mode （PCM） and valley current-mode （VCM） controlled buck converters, boost converters, and buck-boost converters with ramp compensation are established and their dynamical behaviours are investigated by using the operation region, parameter space map, bifurcation diagram, and Lyapunov exponent spectrum. The research results indicate that ramp compensation extends the stable operation range of the PCM controlled switching dc-dc converter to D 〉 0.5 and that of the VCM controlled switching dc-dc converter to D 〈 0.5. Compared with PCM controlled switching dc-dc converters with ramp compensation, VCM controlled switching dc-dc converters with ramp compensation exhibit interesting symmetrical dynamics. Experimental results are given to verify the analysis results in this paper.
基金Project supported by Shanghai Leading Academic DisciplineProject (Grant No .T0103) ,and Shanghai Post Doctoral Scienti-fic Research (Grant No .05R214122)
文摘A novel software implementation for current polarity detection and current compensation is presented. For a three-phase zero-voltage soft-switching （ZVS） PWM converter based on phase and amplitude control （PAC）, when saw-tooth carriers with alternate positive and negative slopes are adopted, the positive or negative slopes are chosen according to the phase current polarity. Since polarity reversal causes current distortion, current at the instant of reversal should be compensated for. Based on the characteristic of unity power factor converter in rectification and regeneration modes, a software implementation for current polarity detection is proposed. Distortion of current zero-crossing caused by using saw-tooth carriers with alternate positive and negative slopes is analyzed, and the relevant compensation method is proposed. Experimental study with a 1.5 kW device shows that phase current has a small harmonic content and power factor is high both in rectification and regeneration modes.
文摘A current-mode DC-DC buck converter with high stability is presented. The loop gain＇s expression of the current-mode converter is derived by employing an advanced model of a current-mode control converter. After analyzing the loop gain＇s expression, which illustrates the method of selecting suitable frequency compensation for the control loop,a novel pole-zero tracking frequency compensation is proposed. Based on theoretical analysis, a DC-DC buck converter with high stability is designed with 0.5μm-CMOS technology. The simulated results reveal that the stability of the converter is independent of the load current and the input voltage. Moreover,the converter provides a full load transient response setting time of less than 5μs and overshoots and undershoots of less than 30mV.
基金Project supported by the National Natural Science Foundation of China(Grant No.61371033)the Fok Ying-Tung Education Foundation for Young Teachers in the Higher Education Institutions of China(Grant No.142027)+1 种基金the Sichuan Provincial Youth Science and Technology Fund,China(Grant Nos.2014JQ0015and 2013JQ0033)the Fundamental Research Funds for the Central Universities,China(Grant No.SWJTU11CX029)
文摘The discrete iterative map model of peak current-mode controlled buck converter with constant current load（CCL）,containing the output voltage feedback and ramp compensation, is established in this paper. Based on this model the complex dynamics of this converter is investigated by analyzing bifurcation diagrams and the Lyapunov exponent spectrum. The effects of ramp compensation and output voltage feedback on the stability of the converter are investigated. Experimental results verify the simulation and theoretical analysis. The stability boundary and chaos boundary are obtained under the theoretical conditions of period-doubling bifurcation and border collision. It is found that there are four operation regions in the peak current-mode controlled buck converter with CCL due to period-doubling bifurcation and border-collision bifurcation. Research results indicate that ramp compensation can extend the stable operation range and transfer the operating mode, and output voltage feedback can eventually eliminate the coexisting fast-slow scale instability.
文摘In order to improve the Power Quality(PQ)of traction power supply system and reduce the power rating and operation cost of compensator,a Static VAR Compensator(SVC)integrated Railway Power Conditioner(RPC)is presented in this paper.RPC is a widely used device in the AC electrified railway systems to enhance the PQ indices of the main network.The next generation of this equipment is Active Power Quality Compensator(APQC).The major concern of these compensators is their high kVA rating.In this paper,a hybrid technique is proposed to solve aforementioned problems.A combination of SVC as an auxiliary device is employed together with the main compensators,i.e.,RPC and APQC that leads on to the reduction of power rating of the main compensators.The use of proposed scheme will cause to reduce significantly the initial investment cost of compensation system.The main compensators are only utilized to balance active powers of two adjacent feeder sections and suppress harmonic currents.The SVCs are used to compensate reactive power and suppress the third and fifth harmonic currents.In this paper firstly,the PQ compensation procedure in AC electrified railway is analyzed step by step.Then,the control strategies for SVC and the main compensators are presented.Finally,a simulation is fulfilled using Matlab/Simulink software to verify the effectiveness and validity of the proposed scheme and compensation strategy and also demonstrate that this technique could compensate all PQ problems.
