Improved Belief Propagation Decoder for LDPC-CRC-Polar Codes with Bit-Freezing

Though belief propagation bit-flip(BPBF)decoding improves the error correction performance of polar codes,it uses the exhaustive flips method to achieve the error correction performance of CA-SCL decoding,thus resulting in high decoding complexity and latency.To alleviate this issue,we incorporate the LDPC-CRC-Polar coding scheme with BPBF and propose an improved belief propagation decoder for LDPC-CRC-Polar codes with bit-freezing(LDPCCRC-Polar codes BPBFz).The proposed LDPCCRC-Polar codes BPBFz employs the LDPC code to ensure the reliability of the flipping set,i.e.,critical set(CS),and dynamically update it.The modified CS is further utilized for the identification of error-prone bits.The proposed LDPC-CRC-Polar codes BPBFz obtains remarkable error correction performance and is comparable to that of the CA-SCL(L=16)decoder under medium-to-high signal-to-noise ratio(SNR)regions.It gains up to 1.2dB and 0.9dB at a fixed BLER=10-4compared with BP and BPBF(CS-1),respectively.In addition,the proposed LDPC-CRC-Polar codes BPBFz has lower decoding latency compared with CA-SCL and BPBF,i.e.,it is 15 times faster than CA-SCL(L=16)at high SNR regions.

Parallel Implementation of the CCSDS Turbo Decoder on GPU

This paper presents a software turbo decoder on graphics processing units(GPU).Unlike previous works,the proposed decoding architecture for turbo codes mainly focuses on the Consultative Committee for Space Data Systems(CCSDS)standard.However,the information frame lengths of the CCSDS turbo codes are not suitable for flexible sub-frame parallelism design.To mitigate this issue,we propose a padding method that inserts several bits before the information frame header.To obtain low-latency performance and high resource utilization,two-level intra-frame parallelisms and an efficient data structure are considered.The presented Max-Log-Map decoder can be adopted to decode the Long Term Evolution(LTE)turbo codes with only small modifications.The proposed CCSDS turbo decoder at 10 iterations on NVIDIA RTX3070 achieves about 150 Mbps and 50Mbps throughputs for the code rates 1/6 and 1/2,respectively.

Quantized Decoders that Maximize Mutual Information for Polar Codes

In this paper,we innovatively associate the mutual information with the frame error rate(FER)performance and propose novel quantized decoders for polar codes.Based on the optimal quantizer of binary-input discrete memoryless channels(BDMCs),the proposed decoders quantize the virtual subchannels of polar codes to maximize mutual information(MMI)between source bits and quantized symbols.The nested structure of polar codes ensures that the MMI quantization can be implemented stage by stage.Simulation results show that the proposed MMI decoders with 4 quantization bits outperform the existing nonuniform quantized decoders that minimize mean-squared error(MMSE)with 4 quantization bits,and yield even better performance than uniform MMI quantized decoders with 5 quantization bits.Furthermore,the proposed 5-bit quantized MMI decoders approach the floating-point decoders with negligible performance loss.

基于encoder-decoder框架的城镇污水厂出水水质预测

由于污水厂的出水水质指标繁多、污水处理过程中反应复杂、时序非线性程度高,基于机理模型的预测方法无法取得理想效果。针对此问题,提出基于深度学习的污水厂出水水质预测方法,并以吉林省某污水厂监测水质为来源数据,利用多种结合encoder-decoder结构的神经网络预测水质。结果显示,所提结构对LSTM和GRU网络预测能力都有一定提升,对长期预测能力提升更加显著,ED-GRU模型效果最佳,短期预测中的4个出水水质指标均方根误差(RMSE)为0.7551、0.2197、0.0734、0.3146,拟合优度(R2)为0.9013、0.9332、0.9167、0.9532,可以预测出水质局部变化,而长期预测中的4个指标RMSE为1.7204、1.7689、0.4478、0.8316,R2为0.4849、0.5507、0.4502、0.7595,可以预测出水质变化趋势,与顺序结构相比,短期预测RMSE降低10%以上,R2增加2%以上,长期预测RMSE降低25%以上,R2增加15%以上。研究结果表明,基于encoder-decoder结构的神经网络可以对污水厂出水水质进行准确预测,为污水处理工艺改进提供技术支撑。

基于时空特征融合的Encoder-Decoder多步4D短期航迹预测

航迹预测在确保空中交通安全、高效运行中扮演着至关重要的角色。所预测的航迹信息是航迹优化、冲突告警等决策工具的输入,而预测准确性取决于模型对航迹序列特征的提取能力。航迹序列数据是具有丰富时空特征的多维时间序列,其中每个变量都呈现出长短期的时间变化模式,并且这些变量之间还存在着相互依赖的空间信息。为了充分提取这种时空特征,本文提出了基于融合时空特征的编码器-解码器(Spatio-Temporal EncoderDecoder,STED)航迹预测模型。在Encoder中使用门控循环单元(Gated Recurrent Unit,GRU)、卷积神经网络(Convolutional Neural Network,CNN)和注意力机制(Attention,AT)构成的双通道网络来分别提取航迹时空特征,Decoder对时空特征进行拼接融合,并利用GRU对融合特征进行学习和递归输出,实现对未来多步航迹信息的预测。利用真实的航迹数据对算法性能进行验证,实验结果表明,所提STED网络模型能够在未来10 min预测范围内进行高精度的短期航迹预测,相比于LSTM、CNN-LSTM和AT-LSTM等数据驱动航迹预测模型具有更高的精度。此外,STED网络模型预测一个航迹点平均耗时为0.002 s,具有良好的实时性。

Arbitrary Decode-Forward Relaying with Re-Encoded Bits Selection Strategy for Polar Codes

In this paper,we propose an arbitrary decode-forward single-relay scheme for finite blocklength polar codes,which can be applied to the general symmetric discrete memoryless relay channel with orthogonal receiver components.The relay node decodes the received message.The relay node selectively re-encodes the message and transmits it to the destination node.Furthermore,in order to minimize the upper-bound of the block error probability,we propose a selection strategy to decide the proper re-encoded bit set by the relay.Simulation results are presented to illustrate the improvement in decoding performance of the proposed scheme compared to conventional relay schemes in both additive white Gaussian noise(AWGN)channel and Rayleigh fading channel(RFC).

利用Encoder-Decoder框架的深度学习网络实现绕射波分离及成像

利用单纯绕射波场实现地下地质异常体的识别具有坚实的理论基础,对应的实施方法得到了广泛研究,且有效地应用于实际勘探。但现有技术在微小尺度异常体成像方面收效甚微,相关研究多数以射线传播理论为基础,对于影响绕射波分离成像精度的因素分析并不完备。相较于反射波,由于存在不连续构造而产生的绕射波能量微弱并且相互干涉,同时环境干扰使得绕射波进一步湮没。因此,更高精度的波场分离及单独成像是现阶段基于绕射波超高分辨率处理、解释的重点研究方向。为此,首先针对地球物理勘探中地质异常体的准确定位,以携带高分辨率信息的绕射波为研究对象,系统分析在不同尺度、不同物性参数的异常体情况下绕射波的能量大小及形态特征,掌握绕射波与其他类型波叠加的具体形式;然后根据相应特征性质提出基于深度学习技术的绕射波分离成像方法,即利用Encoder-Decoder框架的空洞卷积网络捕获绕射波场特征,从而实现绕射波分离,基于速度连续性原则构建单纯绕射波场的偏移速度模型并完成最终成像。数据测试表明,该方法最终可满足微小地质异常体高精度识别的需求。

Unifying Convolution and Transformer Decoder for Textile Fiber Identification

At present,convolutional neural networks(CNNs)and transformers surpass humans in many situations(such as face recognition and object classification),but do not work well in identifying fibers in textile surface images.Hence,this paper proposes an architecture named FiberCT which takes advantages of the feature extraction capability of CNNs and the long-range modeling capability of transformer decoders to adaptively extract multiple types of fiber features.Firstly,the convolution module extracts fiber features from the input textile surface images.Secondly,these features are sent into the transformer decoder module where label embeddings are compared with the features of each type of fibers through multi-head cross-attention and the desired features are pooled adaptively.Finally,an asymmetric loss further purifies the extracted fiber representations.Experiments show that FiberCT can more effectively extract the representations of various types of fibers and improve fiber identification accuracy than state-of-the-art multi-label classification approaches.

基于Encoder-Decoder-ILSTM模型的瓦斯浓度预测研究

近年来,神经网络在各领域均发挥了巨大作用,同样在煤矿瓦斯浓度预测当中也有应用。为了提高模型的预测精度和实时性,结合Encoder-Decoder结构、长短期记忆形成、蛇优化算法提出了一种新的神经网络,为促进煤矿安全生产提供了技术支持。

High Speed Versatile Reed-Solomon Decoder for Correcting Errors and Erasures

A new Chien search method for shortened Reed-Solomon （RS） code is proposed, based on this, a versatile RS decoder for correcting both errors and erasures is designed. Compared with the traditional RS decoder, the weighted coefficient of the Chien search method is calculated sequentially through the three pipelined stages of the decoder. And therefore, the computation of the errata locator polynomial and errata evaluator polynomial needs to be modified. The versatile RS decoder with minimum distance 21 has been synthesized in the Xilinx Virtex-Ⅱ series field programmable gate array （FPGA） xe2v1000-5 and is used by coneatenated coding system for satellite communication. Results show that the maximum data processing rate can be up to 1.3 Gbit/s.

Parity-check and G-matrix based intelligent early stopping criterion for belief propagation decoder for polar codes

The error correction performance of Belief Propagation(BP)decoding for polar codes is satisfactory compared with the Successive Cancellation(SC)decoding.Nevertheless,it has to complete a fixed number of iterations,which results in high computational complexity.This necessitates an intelligent identification of successful BP decoding for early termination of the decoding process to avoid unnecessary iterations and minimize the computational complexity of BP decoding.This paper proposes a hybrid technique that combines the“paritycheck”with the“G-matrix”to reduce the computational complexity of BP decoder for polar codes.The proposed hybrid technique takes advantage of the parity-check to intelligently identify the valid codeword at an early stage and terminate the BP decoding process,which minimizes the overhead of the G-matrix and reduces the computational complexity of BP decoding.We explore a detailed mechanism incorporating the parity bits as outer code and prove that the proposed hybrid technique minimizes the computational complexity while preserving the BP error correction performance.Moreover,mathematical formulation for the proposed hybrid technique that minimizes the computation cost of the G-matrix is elaborated.The performance of the proposed hybrid technique is validated by comparing it with the state-of-the-art early stopping criteria for BP decoding.Simulation results show that the proposed hybrid technique reduces the iterations by about 90%of BP decoding in a high Signal-to-Noise Ratio(SNR)(i.e.,3.5~4 dB),and approaches the error correction performance of G-matrix and conventional BP decoder for polar codes.

Serial Genetic Algorithm Decoder for Low Density Parity Check Codes

Genetic algorithms are successfully used for decoding some classes of error correcting codes, and offer very good performances for solving large optimization problems. This article proposes a new decoder based on Serial Genetic Algorithm Decoder (SGAD) for decoding Low Density Parity Check (LDPC) codes. The results show that the proposed algorithm gives large gains over sum-product decoder, which proves its efficiency.

Area optimization of parallel Chien search architecture for Reed-Solomon(255,239) decoder

A global optimization algorithm （GOA） for parallel Chien search circuit in Reed-Solomon （RS） （255,239） decoder is presented. By finding out the common modulo 2 additions within groups of Galois field （GF） multipliers and pre-computing the common items, the GOA can reduce the number of XOR gates efficiently and thus reduce the circuit area. Different from other local optimization algorithms, the GOA is a global one. When there are more than one maximum matches at a time, the best match choice in the GOA has the least impact on the final result by only choosing the pair with the smallest relational value instead of choosing a pair randomly. The results show that the area of parallel Chien search circuits can be reduced by 51% compared to the direct implementation when the group-based GOA is used for GF multipliers and by 26% if applying the GOA to GF multipliers separately. This optimization scheme can be widely used in general parallel architecture in which many GF multipliers are involved.

基于Encoder-Decoder注意力网络的异常驾驶行为在线识别方法

异常驾驶行为是车辆安全运行的重大威胁,其对人员与物资的安全高效投送造成严重危害。以低成本非接触式的手机多传感器数据为基础,通过对驾驶行为特性进行数据分析,提出一种融合Encoder-Decoder深度网络与Attention机制的异常驾驶行为的在线识别方法。该方法由基于LSTM(long short-term memory)的Encoder-Decoder、Attention机制与基于SVM(support vector machine)的分类器3个模块构成。该系统识别方法包括:输入编码、注意力学习、特征解码、序列重构、残差计算与驾驶行为分类等6个步骤。该技术方法利用自然驾驶条件下所采集的手机传感器数据进行实验。实验结果表明:①手机多传感器数据融合方法对驾驶行为识别具备有效性;②异常驾驶行为必然会造成数据异常波动;③Attention机制有助于提升模型学习效果,对所提出模型的识别准确率F1-score为0.717,与经典同类模型比较,准确率得到显著提升;④对于汽车异常驾驶行为来说,SVM比Logistic与随机森林算法具有更优越的识别效果。

Efficient VLSI architecture of CAVLC decoder with power optimized

This paper presents an efficient VLSI architecture of the contest-based adaptive variable length code （CAVLC） decoder with power optimized for the H.264/advanced video coding （AVC） standard. In the proposed design, according to the regularity of the codewords, the first one detector is used to solve the low efficiency and high power dissipation problem within the traditional method of table-searching. Considering the relevance of the data used in the process of runbefore＇s decoding, arithmetic operation is combined with finite state machine （FSM）, which achieves higher decoding efficiency. According to the CAVLC decoding flow, clock gating is employed in the module level and the register level respectively, which reduces 43% of the overall dynamic power dissipation. The proposed design can decode every syntax element in one clock cycle. When the proposed design is synthesized at the clock constraint of 100 MHz, the synthesis result shows that the design costs 11 300 gates under a 0.25 μm CMOS technology, which meets the demand of real time decoding in the H.264/AVC standard.

A Total Dose Radiation Hardened PDSOI CMOS 3-Line to 8-Line Decoder

The first domestic total dose hardened 2μm partially depleted silicon-on-insulator （PDSOI） CMOS 3-line to 8- line decoder fabricated in SIMOX is demonstrated. The radiation performance is characterized by transistor threshold voltage shifts,circuit static leakage currents,and I-V curves as a function of total dose up to 3× 10^5rad（Si）. The worst case threshold voltage shifts of the front channels are less than 20mV for nMOS transistors at 3 × 10^5rad（Si） and follow-up irradiation and less than 70mV for the pMOS transistors. Furthermore, no significant radiation induced leakage currents and functional degeneration are observed.

Determination of quantum toric error correction code threshold using convolutional neural network decoders

Quantum error correction technology is an important solution to solve the noise interference generated during the operation of quantum computers.In order to find the best syndrome of the stabilizer code in quantum error correction,we need to find a fast and close to the optimal threshold decoder.In this work,we build a convolutional neural network(CNN)decoder to correct errors in the toric code based on the system research of machine learning.We analyze and optimize various conditions that affect CNN,and use the RestNet network architecture to reduce the running time.It is shortened by 30%-40%,and we finally design an optimized algorithm for CNN decoder.In this way,the threshold accuracy of the neural network decoder is made to reach 10.8%,which is closer to the optimal threshold of about 11%.The previous threshold of 8.9%-10.3%has been slightly improved,and there is no need to verify the basic noise.

A Decode-and-Forward Scheme for LDPC Coded Three-Way Relay Fading Channels

In this paper a low-density pairwise check(LDPC) coded three-way relay system is considered, where three user nodes desire to exchange messages with the help of one relay node. Since physical-layer network coding is applied, two time slots are sufficient for one round information exchange. In this paper, we present a decode-and-forward(DF) scheme based on joint LDPC decoding for three-way relay channels, where relay decoder partially decodes the network code rather than fully decodes all the user messages. Simulation results show that the new DF scheme considerably outperforms other common schemes in three-way relay fading channels.

Elimination of the Background Noise of the Decoded Image in Fresnel Zone Plate Scanning Holography

A method of digitally high pass filtering in frequency domain is proposed to eliminate the background noise of the decoded image in Fresnel zone plate scanning holography. The high pass filter is designed as a circular stop, which should be suitable to suppressing the background noise significantly and remain much low frequency information of the object. The principle of high pass filtering is that the Fourier transform of the decoded image is multiplied with the high pass filter. Thus the frequency spectrum of the decoded image without the background noise is achieved. By inverse Fourier transform of the spectrum of the decoded image after multiplying operation, the decoded image without the background noise is obtained. Both of the computer simulations and the experimental results show that the contrast and the signal-to-noise ratio of the decoded image are significantly improved with digital filtering.

Construction of Quasi-Cyclic Low-Density Parity-Check Codes for Simplifying Shuffle Networks in Layered Decoder

Offset Shuffle Networks(OSNs) interleave a-posterior probability messages in the Block Row-Layered Decoder(BRLD) of QuasiCyclic Low-Density Parity-Check(QC-LDPC)codes.However,OSNs usually consume a significant amount of computational resources and limit the clock frequency,particularly when the size of the Circulant Permutation Matrix(CPM)is large.To simplify the architecture of the OSN,we propose a Simplified Offset Shuffle Network Block Progressive Edge-Growth(SOSNBPEG) algorithm to construct a class of QCLDPC codes.The SOSN-BPEG algorithm constrains the shift values of CPMs and the difference of the shift values in the same column by progressively appending check nodes.Simulation results indicate that the error performance of the SOSN-BPEG codes is the same as that of the codes in WiMAX and DVB-S2.The SOSNBPEG codes can reduce the complexity of the OSNs by up to 54.3%,and can improve the maximum frequency by up to 21.7%for various code lengths and rates.