Nowadays, from home monitoring to large airport security, a lot of digital video surveillance systems have been used. Digital surveillance system usually requires streaming video processing abilities. As an advanced v...Nowadays, from home monitoring to large airport security, a lot of digital video surveillance systems have been used. Digital surveillance system usually requires streaming video processing abilities. As an advanced video coding method, H.264 is introduced to reduce the large video data dramatically (usually by 70X or more). However, computational overhead occurs when coding and decoding H.264 video. In this paper, a System-on-a-Chip (SoC) based hardware acceleration solution for video codec is proposed, which can also be used for other software applications. The characteristics of the video codec are analyzed by using the profiling tool. The Hadamard function, which is the bottleneck of H.264, is identified not only by execution time but also another two attributes, such as cycle per loop and loop round. The Co-processor approach is applied to accelerate the Hadamard function by transforming it to hardware. Performance improvement, resource costs and energy consumption are compared and analyzed. Experimental results indicate that 76.5% energy deduction and 8.09X speedup can be reached after balancing these three key factors.展开更多
In the study and implementation of a programmable RS codec module in satellite communication modem, FPGA is used as the kernel in the implementation, while some ASICs are used as necessary assistant measures. The modu...In the study and implementation of a programmable RS codec module in satellite communication modem, FPGA is used as the kernel in the implementation, while some ASICs are used as necessary assistant measures. The module includes the RS codec unit, the interleaver and deinterleaver unit, the scrambler and descrambler unit and the frame synchronization unit. The module is realized successfully and it can be programmed on-line to meet the requirements of IESS 308/309/310 including many specifications about different service types and data rates. With the implementation combining FPGA with ASICs, size of the circuit is much reduced, its flexibility dramatically increased, and its stability further strengthened. Furthermore, the module is based on the software radio concept and can be easily integrated into the whole satellite communication modem.展开更多
Aiming at improving rate flexibility of the enhanced voice services (EVS) channel-aware mode for various VoIP applications, two new bit-rate channel-aware modes are proposed in this paper in addition to the existing 1...Aiming at improving rate flexibility of the enhanced voice services (EVS) channel-aware mode for various VoIP applications, two new bit-rate channel-aware modes are proposed in this paper in addition to the existing 13.2 kbit/s mode. Channel-aware mode uses forward error correction by transmitting re-encoded information redundantly for use when the original information is lost or discarded due to late arrival to the receiver. The primary frame bit rate is reduced for the redundant accommodation. A modified quantization scheme is proposed for core encoding regarding the quality degradation. Partial redundant coding is a simplification of that in the existing 13.2 kbit/s channel-aware mode due to the bit constraint. The objective evaluation results of PESQ show that the additional channel-aware modes achieve similar performance in improving the error robustness against missing packets as that of the existing 13.2 kbit/s mode. Multiple bit-rate modes can be dynamically selected in the communication system for more voice services in different bandwidths. On the other hand, optimal allocation based on real-time feedback can adapt to the rapidly-changing network environment as well as possible.展开更多
The different formats of codec stream carried in the radio access network and the core network make the double speech encoding/decoding necessary, which degrades the speech quality. Accordingly, codec negotiation tech...The different formats of codec stream carried in the radio access network and the core network make the double speech encoding/decoding necessary, which degrades the speech quality. Accordingly, codec negotiation technologies are necessary for unifying encoding/ decoding in the whole process. Transcoder Free Operation (TrFO), Tandem Free Operation (TFO), and network quality deciding technology are the leading codec negotiation technologies. The TrFO is a mechanism for optimum selection during the establishment of a call. It tries to establish connection between User Equipment (UE) without Transcoder (TC). Its successful fulfillment enables the efficient utilization of bandwidth. The TFO, a standby technology of TrFO, is the negotiation technology of an in-band codec. With it, the user codec stream is free from the compression and decompression by the voice codec, and the quality of voice can accordingly be improved. The network-quantity deciding technology adopts G.711 or G.729 flexibly according to the number of accessed calls. This allows the access of new calls while won’t increase the load of network too much.展开更多
The purpose of this paper is to build a secured and reliable vehicle anti-theft system which will have the ability to access the vehicle subsystems from a remote location where there is GSM network. And also, the desi...The purpose of this paper is to build a secured and reliable vehicle anti-theft system which will have the ability to access the vehicle subsystems from a remote location where there is GSM network. And also, the design method involves the interfacing of GSM/GPRS modem module with the vehicle ignition subsystem, and the test result shows that it performs some control actions on the vehicle subsystems from a mobile phone, having taken the advantage of the wide coverage area of some GSM networks. Hence the topic is “Remotely Controlled Vehicle Anti-theft System via GSM Network”.展开更多
The design and realization of a videoconference system based on international recommendation are introduced in this paper, and the hardware implementation of video codec based on ITU-T H. 261 is briefly discussed. Fur...The design and realization of a videoconference system based on international recommendation are introduced in this paper, and the hardware implementation of video codec based on ITU-T H. 261 is briefly discussed. Furthermore, the buffer control method and the adaptive control strategy for quantization are proposed, which are adaptive and robust. This system can be operated under the transmission rate ranging from 128kb/s to 2Mb/s. With these strategies for the videoconference system, the high quality image is obtained. The time delay of the system is about half a second.展开更多
ITU-T G. 729 is the primarily recommended speech codec by H. 323 standard. This paper describes how to implement G. 729 codec in IP telephony gateway, and goes deep into the programming skills on TMS320C6201 DSP and o...ITU-T G. 729 is the primarily recommended speech codec by H. 323 standard. This paper describes how to implement G. 729 codec in IP telephony gateway, and goes deep into the programming skills on TMS320C6201 DSP and optimizing methods of program code to reduce the speech processing delay time of G. 729 codec. Due to adopting these optimizing methods and programming skills, we have implemented a high-speed speech codec that can process concurrently 20 voice channels with single TMS320C6201 chip in IP telephony gateway. Finally, the paper analyzes the performance results of ITU-T G. 729 codec based on TMS320C6201.展开更多
A fault-tolerant spaceborne mass memory architecture is presented based on entirely commercial-off-theshelf components.The highly modularized and scalable memory kernel supports the hierarchical design and is well sui...A fault-tolerant spaceborne mass memory architecture is presented based on entirely commercial-off-theshelf components.The highly modularized and scalable memory kernel supports the hierarchical design and is well suited to redundancy structure.Error correcting code(ECC) and periodical scrubbing are used to deal with bit errors induced by single event upset.For 8-bit wide devices, the parallel Reed Solomon(10, 8) can perform coder/decoder calculations in one clock cycle, achieving a data rate of several Gb/...展开更多
In this paper, we present a method using video codec technology to compress ECG signals. This method exploits both intra-beat and inter-beat correlations of the ECG signals to achieve high compression ratios (CR) and ...In this paper, we present a method using video codec technology to compress ECG signals. This method exploits both intra-beat and inter-beat correlations of the ECG signals to achieve high compression ratios (CR) and a low percent root mean square difference (PRD). Since ECG signals have both intra-beat and inter-beat redundancies like video signals, which have both intra-frame and inter-frame correlation, video codec technology can be used for ECG compression. In order to do this, some pre-process will be needed. The ECG signals should firstly be segmented and normalized to a sequence of beat cycles with the same length, and then these beat cycles can be treated as picture frames and compressed with video codec technology. We have used records from MIT-BIH arrhythmia database to evaluate our algorithm. Results show that, besides compression efficiently, this algorithm has the advantages of resolution adjustable, random access and flexibility for irregular period and QRS false detection.展开更多
文摘Nowadays, from home monitoring to large airport security, a lot of digital video surveillance systems have been used. Digital surveillance system usually requires streaming video processing abilities. As an advanced video coding method, H.264 is introduced to reduce the large video data dramatically (usually by 70X or more). However, computational overhead occurs when coding and decoding H.264 video. In this paper, a System-on-a-Chip (SoC) based hardware acceleration solution for video codec is proposed, which can also be used for other software applications. The characteristics of the video codec are analyzed by using the profiling tool. The Hadamard function, which is the bottleneck of H.264, is identified not only by execution time but also another two attributes, such as cycle per loop and loop round. The Co-processor approach is applied to accelerate the Hadamard function by transforming it to hardware. Performance improvement, resource costs and energy consumption are compared and analyzed. Experimental results indicate that 76.5% energy deduction and 8.09X speedup can be reached after balancing these three key factors.
文摘In the study and implementation of a programmable RS codec module in satellite communication modem, FPGA is used as the kernel in the implementation, while some ASICs are used as necessary assistant measures. The module includes the RS codec unit, the interleaver and deinterleaver unit, the scrambler and descrambler unit and the frame synchronization unit. The module is realized successfully and it can be programmed on-line to meet the requirements of IESS 308/309/310 including many specifications about different service types and data rates. With the implementation combining FPGA with ASICs, size of the circuit is much reduced, its flexibility dramatically increased, and its stability further strengthened. Furthermore, the module is based on the software radio concept and can be easily integrated into the whole satellite communication modem.
基金Supported by the International Cooperation Research Project between Ericsson(Sweden) and BIT
文摘Aiming at improving rate flexibility of the enhanced voice services (EVS) channel-aware mode for various VoIP applications, two new bit-rate channel-aware modes are proposed in this paper in addition to the existing 13.2 kbit/s mode. Channel-aware mode uses forward error correction by transmitting re-encoded information redundantly for use when the original information is lost or discarded due to late arrival to the receiver. The primary frame bit rate is reduced for the redundant accommodation. A modified quantization scheme is proposed for core encoding regarding the quality degradation. Partial redundant coding is a simplification of that in the existing 13.2 kbit/s channel-aware mode due to the bit constraint. The objective evaluation results of PESQ show that the additional channel-aware modes achieve similar performance in improving the error robustness against missing packets as that of the existing 13.2 kbit/s mode. Multiple bit-rate modes can be dynamically selected in the communication system for more voice services in different bandwidths. On the other hand, optimal allocation based on real-time feedback can adapt to the rapidly-changing network environment as well as possible.
文摘The different formats of codec stream carried in the radio access network and the core network make the double speech encoding/decoding necessary, which degrades the speech quality. Accordingly, codec negotiation technologies are necessary for unifying encoding/ decoding in the whole process. Transcoder Free Operation (TrFO), Tandem Free Operation (TFO), and network quality deciding technology are the leading codec negotiation technologies. The TrFO is a mechanism for optimum selection during the establishment of a call. It tries to establish connection between User Equipment (UE) without Transcoder (TC). Its successful fulfillment enables the efficient utilization of bandwidth. The TFO, a standby technology of TrFO, is the negotiation technology of an in-band codec. With it, the user codec stream is free from the compression and decompression by the voice codec, and the quality of voice can accordingly be improved. The network-quantity deciding technology adopts G.711 or G.729 flexibly according to the number of accessed calls. This allows the access of new calls while won’t increase the load of network too much.
文摘The purpose of this paper is to build a secured and reliable vehicle anti-theft system which will have the ability to access the vehicle subsystems from a remote location where there is GSM network. And also, the design method involves the interfacing of GSM/GPRS modem module with the vehicle ignition subsystem, and the test result shows that it performs some control actions on the vehicle subsystems from a mobile phone, having taken the advantage of the wide coverage area of some GSM networks. Hence the topic is “Remotely Controlled Vehicle Anti-theft System via GSM Network”.
基金the High Technology Research and Development Programme of China
文摘The design and realization of a videoconference system based on international recommendation are introduced in this paper, and the hardware implementation of video codec based on ITU-T H. 261 is briefly discussed. Furthermore, the buffer control method and the adaptive control strategy for quantization are proposed, which are adaptive and robust. This system can be operated under the transmission rate ranging from 128kb/s to 2Mb/s. With these strategies for the videoconference system, the high quality image is obtained. The time delay of the system is about half a second.
基金Supported by the National Natural Science Foundation of China under grant!69773046
文摘ITU-T G. 729 is the primarily recommended speech codec by H. 323 standard. This paper describes how to implement G. 729 codec in IP telephony gateway, and goes deep into the programming skills on TMS320C6201 DSP and optimizing methods of program code to reduce the speech processing delay time of G. 729 codec. Due to adopting these optimizing methods and programming skills, we have implemented a high-speed speech codec that can process concurrently 20 voice channels with single TMS320C6201 chip in IP telephony gateway. Finally, the paper analyzes the performance results of ITU-T G. 729 codec based on TMS320C6201.
基金Supported by Innovative Program of Chinese Academy of Sciences (No. KGCY-SYW-407-02)Grand International Cooperation Foundation of Shanghai Science and Technology Commission (No. 052207046)
文摘A fault-tolerant spaceborne mass memory architecture is presented based on entirely commercial-off-theshelf components.The highly modularized and scalable memory kernel supports the hierarchical design and is well suited to redundancy structure.Error correcting code(ECC) and periodical scrubbing are used to deal with bit errors induced by single event upset.For 8-bit wide devices, the parallel Reed Solomon(10, 8) can perform coder/decoder calculations in one clock cycle, achieving a data rate of several Gb/...
文摘In this paper, we present a method using video codec technology to compress ECG signals. This method exploits both intra-beat and inter-beat correlations of the ECG signals to achieve high compression ratios (CR) and a low percent root mean square difference (PRD). Since ECG signals have both intra-beat and inter-beat redundancies like video signals, which have both intra-frame and inter-frame correlation, video codec technology can be used for ECG compression. In order to do this, some pre-process will be needed. The ECG signals should firstly be segmented and normalized to a sequence of beat cycles with the same length, and then these beat cycles can be treated as picture frames and compressed with video codec technology. We have used records from MIT-BIH arrhythmia database to evaluate our algorithm. Results show that, besides compression efficiently, this algorithm has the advantages of resolution adjustable, random access and flexibility for irregular period and QRS false detection.
