Novel Substrate pn Junction Isolation for RF Integrated Inductors on Silicon

A new method for reducing the substrate rated losses of integrated spiral inductors is presented.The method is to block the eddy currents induced by spiral inductors by directly forming pn junction isolation in the Si substrate. The substrate pn junction can be realized by using the standard silicon technologies without any additional processing steps.Integrated inductors on silicon are designed and fabricated. S parameters of the inductor based equivalent circuit are investigated and the inductor parameters are calculated.The impacts of the substrate pn junction isolation on the inductor quality factor are studied.The experimental results show that substrate pn junction isolation in certain depth has achieved a significant improvement.At 3GHz,the substrate pn junction isolation increases the inductor quality factor by 40%.

A 2.4GHz CMOS Quadrature Voltage-Controlled Oscillator Based on Symmetrical Spiral Inductors and Differential Diodes

A voltage controlled oscillator (VCO) which can generate 2 4GHz quadrature local oscillating (LO) signals is reported.It combines a LC VCO,realized by on chip symmetrical spiral inductors and differential diodes,and a two stage ring VCO.The principle of this VCO is demonstrated and further the phase noise is discussed in detail.The fabrication of prototype is demonstrated using 0 25μm single poly five metal N well salicide CMOS digital process.The reports show that the novel VCO is can generate quadrature LO signals with a tuning range of more than 300MHz as well as the phase noise--104 33dBc/Hz at 600KHz offset at 2 41GHz (when measuring only one port of differential outputs).In addition,this VCO can work in low power supply voltage and dissipate low power,thus it can be used in many integrated transceivers.

A Novel Local-Dielectric-Thickening Technique for Performance Improvements of Spiral Inductors on Si Substrates

A novel local-dielectric-thickening technique i s presented for performance improvements of Si-based spiral inductors.This technique employs the processes of deposition,photolithography,and wet-etching,to locally thicken the oxide layer under the inductor,which can decrease the substrate loss and improve the inductor performance.Both the structures and processes are compact,economical,and compatible with CMOS processing.Several square spiral inductors with different inductances are fabricated,and the quality factors and the self-resonant frequencies both increase clearly with this proposed technique:for the 10nH,5nH,and 2nH inductors,the peak quality factors are effectively improved by 46.7%,49.7%,and 68.6%,respectively;however,the improvement percents of the self-resonant frequencies are more significant,which are 92.1%,91.0%,and no less than 68.1% respectively.

Analysis and Optimum Design of Differential Inductors Using Distributed Capacitance Model

A distributed capacitance model for monolithic inductors is developed to predict the equivalently parasitical capacitances of the inductor.The ratio of the self-resonant frequency (f SR) of the differential-driven symmetric inductor to the f SR of the single-ended driven inductor is firstly predicted and explained.Compared with a single-ended configuration,experimental data demonstrate that the differential inductor offers a 127% greater maximum quality factor and a broader range of operating frequencies.Two differential inductors with low parasitical capacitance are developed and validated.

Parameter Extraction for 2-π Equivalent Circuit Model of RF CMOS Spiral Inductors

A novel parameter extraction method with rational functions is presented for the 2-πequivalent circuit model of RF CMOS spiral inductors. The final S-parameters simulated by the circuit model closely match experimental data. The extraction strategy is straightforward and can be easily implemented as a CAD tool to model spiral inductors. The resulting circuit models will be very useful for RF circuit designers.

Fabrication of Meander and Spiral Type Micro Inductors

To obtain microstructure of magnetic devices, the thin film inductors were fabricated by the process such as thin film manufacturing, photolithography and wet etching. The frequency characteristics of these devices are measured at high frequency range. When the inductor sizes of the spiral and the meander type are same, the inductance and the quality factor of the spiral type inductor are larger than those of the meander type inductor, but the driving frequency of the spiral type inductor is lower than that of the meander type inductor.

The coupling effect of air-bridges on broadband spiral inductors in SiC-based MMIC technology

The coupling effect of air-bridges on broadband spiral inductors in SiC-based MMIC technology has been investigated deeply. The fabricated 1-nH spiral inductor on SiC substrate demonstrates a self-resonant frequency of 51.6 GHz, with a peak Q-fact of 12.14 at 22.1 GHz. From the S-parameters measurements, the exponential decay phenomenon is observed for L, Q-factor, and SRF with the air-bridge height decreasing, and an analytic expression is concluded to exactly fit the measured data which can be used to predict the performance of the spiral inductor. All the coefficients in the formula have specific meaning. By means of establishing the lumped model, the parasitic coupling capacitance of the air-bridge has been extracted and presents the exponential decay with the air-bridge heights decreasing which indicates that this capacitor is directly related to the coupling effect of the air-bridge. Through the electromagnetic field distribution simulation, the details of the electric field around the air-bridge have been presented which demonstrate the formation and the variation principles of the coupling effect.

Effect of lateral structure parameters of SiGe HBTs on synthesized active inductors

The effect of lateral structure parameters of transistors including emitter width, emitter length, and emitter stripe number on the performance parameters of the active inductor （AI）, such as the effective inductance Ls, quality factor Q, and self-resonant frequency too is analyzed based on 0.35%tm SiGe BiCMOS process. The simulation results show that for AI operated under fixed current density Jc, the HBT lateral structure parameters have significant effect on Ls but little influence on Q and 090, and the larger Ls can be realized by the narrow, short emitter stripe and few emitter stripes of SiGe HBTs. On the other hand, for AI with fixed HBT size, smaller Jc is beneficial for AI to obtain larger Ls, but with a cost of smaller Q and 090. In addition, under the fixed collector current Ic, the larger the size of HBT is, the larger Ls becomes, but the smaller Q and ab become. The obtained results provide a reference for selecting geometry of transistors and operational condition in the design of active inductors.

Fabrication and Performance of Novel RF Spiral Inductors on Silicon

This paper discusses fabrication and performance of novel circular spiral inductors on silicon. The substrate materials underneath the inductor coil are removed by wet etching process. In the fabrication process, fine polishing of the photoresist is used to simplify the processes and ensure perfect contact between the seed layer and the top of pillars. Dry etching technique is used to remove the seed layer. The results show that Q-factor of the inductor is greatly improved by removing silicon underneath the inductor coil. The spiral inductor with line width of 50 μm has a peak Q-factor of 10 for the inductance of 2.5 nH at frequency of 1 GHz, and the resonance frequency of the inductor is about 8.5 GHz. For the inductor of conductor width 80 μm, the peak Q-factor increases to about 17 for inductance of 1.5 nH in the frequency range of 0.05 -3.00 GHz.

Magnetic-Particle-Composite-Medium-Filled Stacked-Spiral Inductors for Radio-Frequency CMOS Applications

Magnetic-particle-composite-medium-filled stacked-spiral inductors for rf complementary metal oxide semiconductor(CMOS)applications in GHz are demonstrated.The new inductor features a nearly closed magnetic circuit loop,an optimized high-permeability and low-loss sub-1μm magnetic particles'composite core,and a developed 0.18-μm CMOS-compatible device fabrication process.An equivalent circuit model with structural amplifying factors is proposed and modeled.The prototype of the 6-level stacked inductor with Co_(2)Z magnetic-particles-composite-medium filling increases the inductance L by 50%,and quality factor Q by 37%at frequencies as high as 1 GHz,with high inductance density as 825 nH/mm2 and a reduced size area by 80%compared to the planar spiral inductor.

Reluctance Network Analysis for Complex Coupled Inductors

The use of reluctance networks has been a conventional practice to analyze transformer structures. Basic transformer structures can be well analyzed by using the magnetic-electric analogues discovered by Heaviside in the 19th century. However, as power transformer structures are getting more complex today, it has been recognized that changing transformer structures cannot be accurately analyzed using the current reluctance network methods. This paper presents a novel method in which the magnetic reluctance network or arbitrary complexity and the surrounding electrical networks can be analyzed as a single network. The method presented provides a straightforward mapping table for systematically linking the electric lumped elements to magnetic circuit elements. The methodology is validated by analyzing several practical transformer structures. The proposed method allows the analysis of coupled inductor of any complexity, linear or non-linear.

Layout Design and Optimization of RF Spiral Inductors on Silicon Substrate

The effects of key geometrical parameters on the performance of integrated spiral inductors are investigated with the 3D electromagnetic simulator HFSS.While varying geometrical parameters such as the number of turns(N),the width of the metal traces(W),the spacing between the traces(S),and the inner diameter(ID),changes in the performance of the inductors are analyzed in detail.The reasons for these changes in performance are presented.Simulation results indicate that the performance of an integrated spiral inductor can be improved by optimizing its layout.Some design rules are summarized.

Analysis of Differences in Inductance of Ni-Cu-Zn Ferrite Chip Inductors during the Plating Process

Although plating is a necessary process for SMT components, it alters the magnetic characteristics and inductance level of Ni-Cu-Zn ferrite components. The results of this work show that the following three factors in plating affect these components, and the effects are different for Ni- and Sn-plating： （1） Plating layers exert stresses and react with the residual stress of components to change the inductance level, and the effect of the tin layer is greater than that of the nickel one; （2） The plating current induces a magnetic field inside the components directly and indirectly, and this remains as remanence inside the components and reduces the inductance level, and the effect level of Ni-plating is greater than that of Sn-plating; （3） The plating solution corrodes the interface of the termination and ferrite core of the components to release the residual stress, and causes an increase in inductance, and the effect of Sn-plating is greater than that of Ni-plating. In addition, the inductance level is the result of the net effect of these three factors, and if the sintering temperature is increased to change in the type of residual stress, the net effect will be changed.

A compact and reconfigurable low noise amplifier employing combinational active inductors and composite resistors feedback techniques

A compact and reconfigurable low noise amplifier(LNA)is proposed by combining an input transistor,composite transistors with Darlington configuration as the amplification and output transistor,T-type structure composite resistors instead of a simplex structure resistor,a shunt inductor feedback realized by a tunable active inductor(AI),a shunt inductor peaking technique realized by another tunable AI.The division and collaboration among different resistances in the T-type structure composite resistor realize simultaneously input impedance matching,output impedance matching and good noise performance;the shunt feedback and peaking technique using two tunable AIs not only extend frequency bandwidth and improve gain flatness,but also make the gain and frequency band can be tuned simultaneously by the external bias of tunable AIs;the Darlington configuration of composite transistors provides high gain;furthermore,the adoption of the small size AIs instead of large size passive spiral inductor,and the use of composite resistors make the LNA have a small size.The LNA is fabricated and verified by GaAs/InGaP hetero-junction bipolar transistor(HBT)process.The results show that at the frequency of 7 GHz,the gain S_(21)is maximum and up to 19 dB;the S_(21)can be tuned from 17 dB to 19 dB by tuning external bias of tunable AIs,that is,the tunable amount of S_(21)is 2 dB,and similarly at 8 GHz;the tunable range of 3 dB bandwidth is 1 GHz.In addition,the gain S_(21)flatness is better than 0.4 dB under frequency from 3.1 GHz to 10.6 GHz;the size of the LNA only has 760μm×1260μm(including PADs).Therefore,the proposed strategies in the paper provide a new solution to the design of small size and reconfigurable ultra-wideband(UWB)LNA and can be used further to adjust the variations of gain and bandwidth of radio frequency integrated circuits(RFICs)due to package,parasitic and the variation of fabrication process and temperature.

Canonic Realizations of Voltage-Controlled Floating Inductors Using CFOAs and Analog Multipliers

New voltage-controlled floating inductors employing CFOAs and an analog multiplier have been presented which have the attractive features of using a canonic number of passive components (only two resistors and a capacitor) and not requiring any component-matching conditions and design constraints for the intended type of inductance realization. The workability and applications of the new circuits have been demonstrated by SPICE simulation and hardware experimental results based upon AD844-type CFOAs and AD633-type/MPY534 type analog multipliers.

一种基于耦合电感的高增益软开关谐振变换器

该文提出了一种具有高增益、软开关的新型谐振变换器。该谐振变换器使用耦合电感来提高电压增益,升压比不仅取决于占空比,还取决于耦合电感的变比,具有高增益的优点。此外,由于采用了有源钳位技术,漏感中的能量可以被回收利用,用来对开关管的结电容充放电提供能量,从而实现软开关。由于采用了耦合电感,所提出的变换器可以在较低的开关管电压应力的情况下实现较高的输出电压,因此可以使用低导通电阻的低压器件,从而提升系统的效率。该文分析了该谐振变换器的工作原理,并推导了输出电压、关断电流应力等参数的解析表达式。在此基础上,从理论上分析了该变换器取得软开关的条件,并对该变换器的各个器件的电压电流应力进行分析,为器件选型提供了理论依据。最后,搭建1kW实验样机,针对该文提出的基于耦合电感的谐振变换器的高增益、软开关、低电压应力、高效率等性能进行了实验验证。通过实验得出所提出的拓扑可以在10倍增益的情况下达到最高97.5%的效率,表明所提拓扑的优越性。

The Application of FDTD and Micro Genetic Algorithms on the Planar Spiral Inductors

High Q inductors are the important elements for RF circuit design. In this paper, the FDTD method is applied to explain the crowding effect of the spiral inductor , which can never be accurately analyzed by analytical solutions. The experimental results verify the FDTD simulation. The micro genetic algorithms and FDTD are combined to design the high Q of the inductor, the results show the efficiency of this exploration.

基于开关电感的宽电压增益双向DC/DC变换器

此处提出了一种用于储能系统的基于开关电感的宽电压增益双向DC/DC变换器。该变换器在实现双向升降压的同时进一步扩大了双向变换器的电压增益,可以适应不同电压等级的储能电池;相同电压增益下功率器件占空比有效降低,进一步减小了输入电流纹波,有助于提高电池充电性能。分析了放电和充电两种工作模式的工作原理,并搭建实验样机进行验证。实验结果表明在输出电压稳定的工况下,该变换器放电模式可以实现0.5~5倍的电压增益,充电模式可以实现0.2~2倍的电压增益,证明了所提变换器的双向升降压能力和宽电压增益能力。

一种应用于两相交错Boost的耦合电感的优化设计

两相交错Boost变换器具有纹波电流小的优势,但其采用的交错并联技术增加了电感数量,进而增加了装置的体积和重量,不利于其功率密度的提升。耦合电感通过将多个磁性元件集成到一个磁芯实现磁路的部分共享,从而减小了磁元件的数量和重量。因此,设计了一种反向耦合电感,并将其应用于两相交错Boost变换器,实现了装置功率密度的提升。首先,对反向耦合电感的工作原理和损耗来源进行分析;然后,在此基础上设计了一种改进的“EE”型磁芯,一方面有效提高了磁芯利用率,另一方面降低了电感的体积与重量;最后,通过有限元仿真对所提优化设计方案进行验证,同时搭建了功率等级为2 kW的两相交错Boost变换器实验平台。仿真和实验结果均验证了所提优化设计方案的有效性。

卧式反应釜电磁感应加热设计

针对大型反应釜的感应加热难以进行大量实验验证的问题,通过将理论计算与有限元仿真相结合的方式,对计算得出的参数进行优化,选择合适的输出功率和谐振频率,完成感应器的设计。通过仿真可以更好对比不同匝数、自热对流和搅拌轴对加热的影响,更直观地查看工件温度分布情况,缩小计算参数误差,实现反应釜加热的工艺要求。