Error Analysis of Approximate Calculation of Voltage Divider Biased Common-Emitter Amplifier

Voltage divider biasing common emitter amplifier is one of the core contents in analog circuit curriculum, and almost all of traditional textbooks apply approximate calculation method to estimate all characteristic parameters. In calculating quiescent point, transistor base current is generally ignored to get the approximate base potential and emitter current, then other operating parameters, and AC small signal parameters can be acquired. The main purpose of this paper is to compare traditional and Thevenin equivalent methods and to get the difference of the two methods. A Formula is given to calculate the error of the traditional method. Example calculating reveals that the traditional method can generate an error about 10%, and even severe for small signal amplifier with higher quiescent point.

Human blood plasma-based electronic integrated circuit amplifier configuration

Dear Editor： There is accumulating evidence that human blood electronic circuit components and their application circuits become more and more important to cyborg implant/engineering, man-machine interface, hu- man disease detection and healing, and artificial brain evolutionusl. Here, we report the first development of human plasma-based amplifier circuit in the dis- crete as well as integrated circuit （IC） configuration mode. Electrolytes in the human blood contain an enormous number of charge carriers such as positive and negative molecule/atom ions, which are electri- cally conducting media and therefore can be utilized for developing electronic circuit components and their application circuits. These electronic circuits obvi- ously have very high application impact potential towards bio-medical engineering and medical science and technology.

Radio Frequency Low Noise Amplifier with Linearizing Bias Circuit

A 1.34 GHz-1=60 MHz low noise amplifier （LNA） designed in a 0.35 pm SiGe process is presented. The designed LNA exhibits a power gain of 21.46 dB and a noise figure （NF） of 1.27 dB at 1.34 GHz. The linearity is improved with an active biasing technique. The post-layout simulation shows an input referred 1-dB compression point （IPldn） of-11.52 dBm. Compared with the recent reported high gain LNAs, the proposed LNA has a much better linearity without degrading other performance. The LNA draws 10 mA current from a 3.3 V power supply.

Digitalized analog integrated circuits

Digital integrated circuits have significantly benefited from technology scaling down,while conventional analog integrated circuits suffer from more design constraints.In recent years,there has been strong research interest in replacing conventional analog blocks with digitally-friendly and digitally-intensive alternatives,while signif-icant progress has been made.This paper reviews the existing digitalized analog integrated circuits,including amplifiers,analog-to-digital converters,phase-locked loops,and power supplies.Based on the review,the future development trends of the digitalized analog integrated circuits are derived.

A Very Low Level dc Current Amplifier Using SC Circuit: Effects of Parasitic Capacitances and Duty Ratio on Its Output

This paper describes a very low level dc current amplifier using switched capacitor (SC) circuit to miniaturize and improve its output response speed, instead of the conventionally used high-oh-mage resistor. A switched capacitor filter (SCF) and an offset controller are also used to decrease vibrations and offset voltage at the output of the amplifier. The simulation results show that the parasitic capacitances that are distributed to the input portion of the amplifier have some effect on offset voltage. From the experimental results, it is seen that the duty ratio of the clock cycle of SC circuit should be in the range from 0.05 to 0.70. It is suggested that the proposed very low level dc current amplifier using SC circuit is an effective way to obtain both a faster output response and its miniaturization.

Synthetic plasma and silicon tubular harness-based purebiological transistor amplifier circuit

Dear Editor:Kosta et al.;first ever reported the development of biologic electronic components viz resistance R,capacitance C,diode D and transistor T using human tissues and human skin.In our early study;,we have demonstrated the feasibility of liquid medium（synthetic blood plasma）to develop bio-transistor,bio-resistor,and bio-capacitor and combined them to form an amplifier using the metallic harness(the interconnecting

A Fully Integrated CMOS Readout Circuit for Particle Detectors

Novel schemes for a charge sensitive amplifier （CSA） and a CR-（RC）, semi-Gaussian shaper in a fully integrated CMOS readout circuit for particle detectors are presented. The CSA is designed with poly-resistors as feedback components to reduce noise. Compared with conventional CSA, the input referred equivalent noise charge（ENC） is simulated to be reduced from 5036e to 2381e with a large detector capacitance of 150pF at the cost of 0.5V output swing loss. The CR-（RC）,semi-Gaussian shaper uses MOS transistors in the triode region in series with poly-resistors to compensate process variation without much linearity reduction.

A4~12GHz Wideband Balanced MIC Power Amplifier

A 4-12GHz wideband power amplifier,using a balanced configuration with a strip line Lange coupler, is designed and fabricated. This power amplifier shows a maximum continuous wave output power of 29.5dBm at 8GHz center frequency with an associated gain of 8.5dB and a gain flatness of ＋ /- 0.6dB in the 4-12GHz frequency range.

A monolithic InGaP/GaAs HBT power amplifier for W-CDMA applications

A monolithic microwave integrated circuit （MMIC） power amplifier （PA） is proposed. It adopts a new on-chip bias circuit, which not only avoids the instability of the direct current bias caused by the change in the power supply and temperature, but also compensates deviations caused by the increase in input power. The bias circuit is a current-mirror configuration, and the feedback circuit helps to maintain bias voltage at a constant level. The gain of the feedback circuit is improved by the addition of a non-inverting amplifier within the feedback circuit. A shunt capacitor at the base node of the active bias transistor enhances the linearity of the PA. The chip is fabricated in an InGaP/GaAs heterojunction bipolar transistor （HBT） process. Measured results exhibit a 26. 6-dBm output compression point, 33.6% power-added efficiency （PAE） and - 40.2 dBc adjacent channel power ratio （ACPR） for wide-band code division multiple access （W-CDMA） applications.

基于π型谐波控制网络的高效功率放大器设计

为了提高通信系统的工作效率,提出一种基于F类理论的π型谐波控制网络。该网络利用直流偏置电路引入二次谐波短路点,从而降低谐波控制电路的复杂度;同时,能够确保二次、三次谐波阻抗不受后续基波匹配电路的影响。为避免寄生参数对晶体管芯漏极阻抗的影响,在π型谐波控制网络与晶体管之间引入L型寄生补偿电路,实现二次谐波阻抗趋近零、三次谐波阻抗趋近无穷大。为验证所设计网络的可行性,设计一款高效率F类功率放大器并进行仿真测试,结果表明在1.8~2.1 GHz工作频带内,饱和输出功率为43.21~44.84 dBm,增益为13.21~14.84 dB,功率附加效率为69.59%~73.54%。由此证明了所提出的π型谐波控制网络在高效率放大器设计中能够很好地满足各项性能指标。

一种应用于NB-IoT通信的高线性CMOS功率放大器

为满足复杂的NB-IoT通信调制模式对功率放大器输出线性度的要求,提出一种面向NB-IoT通信应用的700~900 MHz高线性度CMOS功率放大器(PA)。该放大器采用两级结构,工作于AB类放大状态,驱动级和输出功率级分别采用自偏置的共源共栅结构和共源放大器结构,驱动级为功率级提供大的电压输出摆幅。为提高线性度,采用二极管线性化偏置技术改善晶体管输入电容的非线性导致的增益压缩和相位失真现象,将输出1 dB压缩点提升3.2 dB。采用65 nm/1.2 V CMOS工艺完成电路版图设计,整体放大器的版图尺寸为0.68 mm×1 mm。仿真结果表明,在700~900 MHz工作频带内,功率放大器的小信号增益大于19 dB,输入反射系数S11小于等于-12 dB,功率附加效率(PAE)峰值为29.6%,输出1 dB压缩点为22.7 dBm。所提出的功率放大器电路具有高线性度、低功耗、小尺寸的特点,可有效满足NB-IoT通信并用于700~900 MHz频段内射频信号功率放大的应用需求。

一种用于二次电子探测的放大电路设计

扫描电子显微镜具有非常快的扫描速度,最快可达纳秒级别。而且二次电子信号非常微弱,信号能量仅在50 eV以内。为了更好地实现二次电子信号的成像,通常需要对二次电子探测的放大电路进行专门设计。该放大电路设计采用了ADA4817-1高速低噪声集成运算放大芯片,并设计了一种光电倍增管低噪声前置放大电路,该前置放大电路引入了电源前端滤波以及加法电路。不但实现了稳定放大二次电子信号,提高扫描图像的信噪比等功能,而且能够通过电路线性调节二次电子图像的对比度与亮度。结合信号处理系统,达到了对光电倍增管100 kHz以内的信号增益为27 dB且不失真的目的,从而显著提高了二次电子探测器的分辨率。

A C-band 55% PAE high gain two-stage power amplifier based on AlGaN/GaN HEMT

A C-band high efficiency and high gain two-stage power amplifier based on A1GaN/GaN high electron mobility transistor （HEMT） is designed and measured in this paper. The input and output impedances for the optimum power-added efficiency （PAE） are determined at the fundamental and 2nd harmonic frequency （f0 and 2f0）. The harmonic manipulation networks are designed both in the driver stage and the power stage which manipulate the second harmonic to a very low level within the operating frequency band. Then the inter-stage matching network and the output power combining network are calculated to achieve a low insertion loss. So the PAE and the power gain is greatly improved. In an operation frequency range of 5,4 GHz-5.8 GHz in CW mode, the amplifier delivers a maximum output power of 18.62 W, with a PAE of 55.15 % and an associated power gain of 28.7 dB, which is an outstanding performance.

A G-band terahertz monolithic integrated amplifier in 0.5-μm InP double heterojunction bipolar transistor technology

Design and characterization of a G-band（140–220 GHz） terahertz monolithic integrated circuit（TMIC） amplifier in eight-stage common-emitter topology are performed based on the 0.5-μm In Ga As/In P double heterojunction bipolar transistor（DHBT）. An inverted microstrip line is implemented to avoid a parasitic mode between the ground plane and the In P substrate. The on-wafer measurement results show that peak gains are 20 dB at 140 GHz and more than 15-dB gain at 140–190 GHz respectively. The saturation output powers are-2.688 dBm at 210 GHz and-2.88 dBm at 220 GHz,respectively. It is the first report on an amplifier operating at the G-band based on 0.5-μm InP DHBT technology. Compared with the hybrid integrated circuit of vacuum electronic devices, the monolithic integrated circuit has the advantage of reliability and consistency. This TMIC demonstrates the feasibility of the 0.5-μm InGaAs/InP DHBT amplifier in G-band frequencies applications.

Design of Diode Type Un-Cooled Infrared Focal Plane Array Readout Circuit

The diode infrared focal plane array uses the silicon diodes as a sensitive device for infrared signal measurement. By the infrared radiation, the infrared focal plane can produces small voltage signals. For the traditional readout circuit structures are designed to process current signals, they cannot be applied to it. In this paper, a new readout circuit for the diode un-cooled infrared focal plane array is developed. The principle of detector array signal readout and small signal amplification is given in detail. The readout circuit is designed and simulated by using the Central Semiconductor Manufacturing Corporation （CSMC） 0.5 μm complementary metal-oxide-semiconductor transistor （CMOS） technology library. Cadence Spectre simulation results show that the scheme can be applied to the CMOS readout integrated circuit （ROIC） with a larger array, such as 320×240 size array.

Latest advances in high-performance light sources and optical amplifiers on silicon

Efficient light generation and amplification has long been missing on the silicon platform due to its well-known indirect bandgap nature.Driven by the size,weight,power and cost(SWaP-C)requirements,the desire to fully realize integrated silicon electronic and photonic integrated circuits has greatly pushed the effort of realizing high performance on-chip lasers and amplifiers moving forward.Several approaches have been proposed and demonstrated to address this issue.In this paper,a brief overview of recent progress of the high-performance lasers and amplifiers on Si based on different technology is presented.Representative device demonstrations,including ultra-narrow linewidthⅢ-Ⅴ/Si lasers,fully integratedⅢ-Ⅴ/Si/Si3N4 lasers,high-channel count mode locked quantum dot(QD)lasers,and high gain QD amplifiers will be covered.

DESIGN AND ANALYSIS OF INTEGRATED OPERATIONAL AMPLIFIER XD1531 WITH LOW NOISE AT LOW FREQUENCIES

Principles of design are described for the low frequency integrated operationalamplifler XD1531 with low noise. The procedures of design of both the circuit structure and the tran-sistor shape are considered. The first stage of the circuit is designed with the methods of low noise atlow frequencies. The measures which decrease noises, especially, the 1/f noise originating .from thesemiconductor surface state and defects, are used for the transistor structure design. With analysisand comparison to products here and abroad in characteristics, it is shown that XD1531 has a lowernoise index at low frequencies than others, and the effectiveness of design methods for bringing lownoises have been demonstrated.

基于net CIRCUIT labs的两级交流放大器分析与研究

本文采用net CIRCUIT labs实验云平台对两级放大电路进行分析与研究,分析和测试了放大器的静态工作点、放大倍数以及输入输出阻抗,提供了一种在2020年新冠疫情下开展实际硬件电路云实验的方案。

Design of Si-bipolar Monolithic Main Amplifier IC for Optical Fiber Receivers

A broadband amplifier with transadmittance and transimpedance stages is designed and two types of improved AGC amplifiers are developed on the base of theory study. Making use of the basic amplifier cells, a main amplifier IC for optical-fiber receivers is deliberated. By computer simulating the performances of the designed main amplifier meet the necessity of high gain and wide dynamic range . They are maximum voltage gain of 42 dB, the bandwidth of 730 MHz,the input signal( V p-p )range from 5 mV to 1 V,the output amplitude about 1 V, the dynamic range of 46 dB. The designed circuit containing no inductance and large capacitance will be convenient for realizing integration. A monolithic integrated design of 622 Mb/s main amplifier is completed.

A VERSATILE CURRENT-MODE BIQUAD USING OPERATIONAL AMPLIFIERS

A versatile current-mode biquadratic filter using three operational amplifiers and nine passive elements is proposed. By suitably choosing the output branch, lowpass, bandpass, highpass, bandstop and allpass transfer functions are realized simultaneously without changing the circuit configuration and elements. Two circuits, one is for low frequency application and the other for high frequency, are proposed. The center frequency, quality factor and gain constants of the circuit can be tuned independently. Simulated results show that the circuits work successfully.