This paper studies two-dimensional analysis of the surface state effect on current gain for a 4H-SiC bipolar junction transistor （BJT）. Simulation results indicate the mechanism of current gain degradation, which is...This paper studies two-dimensional analysis of the surface state effect on current gain for a 4H-SiC bipolar junction transistor （BJT）. Simulation results indicate the mechanism of current gain degradation, which is surface Fermi level pinning leading to a strong downward bending of the energy bands to form the channel of surface electron recombination current. The experimental results are well-matched with the simulation, which is modeled by exponential distributions of the interface state density replacing the single interface state trap. Furthermore, the simulation reveals that the oxide quality of the base emitter junction interface is very important for 4H-SiC BJT performance.展开更多
A unified model of low temperature current gain of polysilicon emitter bipolar transistors based on effective recombination method is presented, incorporating band-gap narrowing, carrier freezing-out, tunneling of hol...A unified model of low temperature current gain of polysilicon emitter bipolar transistors based on effective recombination method is presented, incorporating band-gap narrowing, carrier freezing-out, tunneling of holes through polysilicon/silicon interface oxide layer and reduced mobility mechanism in polysilicon. The modeling results based on this model are in good agreement with experimental data.展开更多
In this paper, a new structure of a 4H-SiC bipolar junction transistor （BJT） with a buried layer （BL） in the base is presented. The current gain shows an approximately 100% increase compared with that of the conve...In this paper, a new structure of a 4H-SiC bipolar junction transistor （BJT） with a buried layer （BL） in the base is presented. The current gain shows an approximately 100% increase compared with that of the conventional structure. This is attributed to the creation of a built-in electric field for the minority carriers to transport in the base which is explained based on 2D device simulations. The optimized design of the buried layer region is also considered by numeric simulations.展开更多
In this paper, a novel structure of a 4H-SiC lateral bipolar junction transistor （LBJT） with a base tield plate and double RESURF in the drift region is presented. Collector-base junction depletion extension in the ...In this paper, a novel structure of a 4H-SiC lateral bipolar junction transistor （LBJT） with a base tield plate and double RESURF in the drift region is presented. Collector-base junction depletion extension in the base region is restricted by the base field plate. Thin base as well as low base doping of the LBJT therefore can be achieved under the condition of avalanche breakdown. Simulation results show that thin base of 0.32 μm and base doping of 3 × 1017 cm 3 are obtained, and corresponding current gain is as high as 247 with avalanche breakdown voltage of 3309 V when the drift region length is 30 μm. Besides, an investigation of a 4H-SiC vertical BJT （VBJT） with comparable breakdown voltage （3357 V） shows that the minimum base width of 0.25 ~tm and base doping as high as 8 × 10^17 cm^-3 contribute to a maximum current gain of only 128.展开更多
This paper proposes a thermal analytical model of current gain for bipolar junction transistor-bipolar static induction transistor （BJT-BSIT） compound device in the low current operation. It also proposes a best the...This paper proposes a thermal analytical model of current gain for bipolar junction transistor-bipolar static induction transistor （BJT-BSIT） compound device in the low current operation. It also proposes a best thermal compensating factor to the compound device that indicates the relationship between the thermal variation rate of current gain and device structure. This is important for the design of compound device to be optimized. Finally, the analytical model is found to be in good agreement with numerical simulation and experimental results. The test results demonstrate that thermal variation rate of current gain is below 10% in 25 ℃-85 ℃ and 20% in -55 ℃-25 ℃.展开更多
This paper describes a guardring-free planar InAlAs/InGaAs avalanche photodiode(APD)by computational simulations and experimental results.The APD adopts the structure of separate absorption,charge,and multiplication(S...This paper describes a guardring-free planar InAlAs/InGaAs avalanche photodiode(APD)by computational simulations and experimental results.The APD adopts the structure of separate absorption,charge,and multiplication(SACM)with top-illuminated.Computational simulations demonstrate how edge breakdown effect is suppressed in the guardringfree structure.The fabricated APD experiment results show that it can obtain a very low dark current while achieving a high gain×bandwidth(GB)product.The dark current is 3 nA at 0.9Vb r,and the unit responsivity is 0.4 A/W.The maximum3 dB bandwidth of 24 GHz and a GB product of 360 GHz are achieved for the fabricated APD operating at 1.55μm.展开更多
The accuracy of the measured current is a preeminent parameter for Current Control based Power Converter applications to ensure genuine operation of the designed converter.The current measurement accuracy can be affec...The accuracy of the measured current is a preeminent parameter for Current Control based Power Converter applications to ensure genuine operation of the designed converter.The current measurement accuracy can be affected by several parameters which includes the type of technology used,components used for the selected technology,aging,usage,operating and environmental conditions.The effect of gain resistors and their manufacturing tolerances on differential amplifier-based buck converter current measurement is investigated in this work.The analysis mainly focused on the output voltage variation and its accuracy with respect to the change in gain resistance tolerances.The gain resistors with 5%,1%,0.5%and 0.1%manufacturing tolerances taken for the worst-case analysis and the calculated performance results are compared and verified with the simula-tion results.The Operational amplifiers(Op-Amp)for high frequency power con-verter applications must operate in a high frequency noise environment and the intended current measuring system must manage common mode noise distur-bances paired with the signal to be measured.Based on the Common Mode Rejec-tion Ratio(CMRR)the common mode voltages and noise signals will effectively getfiltered out.Lesser CMRR results in lower common mode signal rejection,resulting in poor precision and noise rejection.In differential amplifiers,the CMRR predominantly depends on gain resistors.So,the variations in Common Mode Rejection Ratio due to gain resistor tolerances also analyzed and compared with the output voltage variations.Besides the effects of resistor tolerances,this paper also examines the effect of Op-Amp offset voltage on output accuracy spe-cifically for low magnitude input currents.The obtained results from this analysis clearly shows that the gain resistors with 0.1%tolerance gives maximum accuracy with improved CMRR and accuracy at low magnitude input currents will get well improved by using Op-Amps with Low Offset voltage specifications.展开更多
文摘This paper studies two-dimensional analysis of the surface state effect on current gain for a 4H-SiC bipolar junction transistor （BJT）. Simulation results indicate the mechanism of current gain degradation, which is surface Fermi level pinning leading to a strong downward bending of the energy bands to form the channel of surface electron recombination current. The experimental results are well-matched with the simulation, which is modeled by exponential distributions of the interface state density replacing the single interface state trap. Furthermore, the simulation reveals that the oxide quality of the base emitter junction interface is very important for 4H-SiC BJT performance.
基金Supported by National Natural Science Foundation of China
文摘A unified model of low temperature current gain of polysilicon emitter bipolar transistors based on effective recombination method is presented, incorporating band-gap narrowing, carrier freezing-out, tunneling of holes through polysilicon/silicon interface oxide layer and reduced mobility mechanism in polysilicon. The modeling results based on this model are in good agreement with experimental data.
文摘In this paper, a new structure of a 4H-SiC bipolar junction transistor （BJT） with a buried layer （BL） in the base is presented. The current gain shows an approximately 100% increase compared with that of the conventional structure. This is attributed to the creation of a built-in electric field for the minority carriers to transport in the base which is explained based on 2D device simulations. The optimized design of the buried layer region is also considered by numeric simulations.
基金supported by the Ministry of Education of China (Grant No. 20100101110056)the Natural Science Foundation for Distinguished Young Scholars of Zhejiang Province of China (Grant No. R1100468)
文摘In this paper, a novel structure of a 4H-SiC lateral bipolar junction transistor （LBJT） with a base tield plate and double RESURF in the drift region is presented. Collector-base junction depletion extension in the base region is restricted by the base field plate. Thin base as well as low base doping of the LBJT therefore can be achieved under the condition of avalanche breakdown. Simulation results show that thin base of 0.32 μm and base doping of 3 × 1017 cm 3 are obtained, and corresponding current gain is as high as 247 with avalanche breakdown voltage of 3309 V when the drift region length is 30 μm. Besides, an investigation of a 4H-SiC vertical BJT （VBJT） with comparable breakdown voltage （3357 V） shows that the minimum base width of 0.25 ~tm and base doping as high as 8 × 10^17 cm^-3 contribute to a maximum current gain of only 128.
文摘This paper proposes a thermal analytical model of current gain for bipolar junction transistor-bipolar static induction transistor （BJT-BSIT） compound device in the low current operation. It also proposes a best thermal compensating factor to the compound device that indicates the relationship between the thermal variation rate of current gain and device structure. This is important for the design of compound device to be optimized. Finally, the analytical model is found to be in good agreement with numerical simulation and experimental results. The test results demonstrate that thermal variation rate of current gain is below 10% in 25 ℃-85 ℃ and 20% in -55 ℃-25 ℃.
基金the National Key R&D Program of China(Grant No.2020YFB1805701)the National Natural Foundation of China(Grant No.61934003)。
文摘This paper describes a guardring-free planar InAlAs/InGaAs avalanche photodiode(APD)by computational simulations and experimental results.The APD adopts the structure of separate absorption,charge,and multiplication(SACM)with top-illuminated.Computational simulations demonstrate how edge breakdown effect is suppressed in the guardringfree structure.The fabricated APD experiment results show that it can obtain a very low dark current while achieving a high gain×bandwidth(GB)product.The dark current is 3 nA at 0.9Vb r,and the unit responsivity is 0.4 A/W.The maximum3 dB bandwidth of 24 GHz and a GB product of 360 GHz are achieved for the fabricated APD operating at 1.55μm.
文摘The accuracy of the measured current is a preeminent parameter for Current Control based Power Converter applications to ensure genuine operation of the designed converter.The current measurement accuracy can be affected by several parameters which includes the type of technology used,components used for the selected technology,aging,usage,operating and environmental conditions.The effect of gain resistors and their manufacturing tolerances on differential amplifier-based buck converter current measurement is investigated in this work.The analysis mainly focused on the output voltage variation and its accuracy with respect to the change in gain resistance tolerances.The gain resistors with 5%,1%,0.5%and 0.1%manufacturing tolerances taken for the worst-case analysis and the calculated performance results are compared and verified with the simula-tion results.The Operational amplifiers(Op-Amp)for high frequency power con-verter applications must operate in a high frequency noise environment and the intended current measuring system must manage common mode noise distur-bances paired with the signal to be measured.Based on the Common Mode Rejec-tion Ratio(CMRR)the common mode voltages and noise signals will effectively getfiltered out.Lesser CMRR results in lower common mode signal rejection,resulting in poor precision and noise rejection.In differential amplifiers,the CMRR predominantly depends on gain resistors.So,the variations in Common Mode Rejection Ratio due to gain resistor tolerances also analyzed and compared with the output voltage variations.Besides the effects of resistor tolerances,this paper also examines the effect of Op-Amp offset voltage on output accuracy spe-cifically for low magnitude input currents.The obtained results from this analysis clearly shows that the gain resistors with 0.1%tolerance gives maximum accuracy with improved CMRR and accuracy at low magnitude input currents will get well improved by using Op-Amps with Low Offset voltage specifications.
