Double-ring high-frequency common-mode switching oscillation current sensor for inverter-fed machine winding insulation monitoring

Insulation failure significantly contributes to the unpredictable shutdown of power equipment.Compared to the partial discharge and high-frequency(HF)injection methods,the HF common-mode(CM)leakage current method offers a non-intrusive and highly sensitive alternative.However,the detection of HF CM currents is susceptible to interference from differential-mode(DM)currents,which exhibit high-amplitude and multifrequency components during normal operation.To address this challenge,this paper proposes a double-ring current sensor based on the principle of magnetic shielding for inverter-fed machine winding insulation monitoring.The inner ring harnesses the magnetic aggregation effect to isolate the DM current magnetic field,whereas the outer ring serves as the magnetic core of the Rogowski current sensor,enabling HF CM current monitoring.First,the magnetic field distributions of the CM and DM currents were analyzed.Then,a correlation between the sensor parameters and signal-to-noise ratio of the target HF CM current was established.Finally,an experimental study was conducted on a 3-kW PMSM for verification.The results indicate that the proposed double-ring HF CM sensor can effectively mitigate DM current interference.Compared to a single-ring sensor,a reduction of approximately 40%in the DM component was achieved,which significantly enhanced the precision of online insulation monitoring.

THE DESIGN OF BALANCED AMPLIFIER BASED ON COMMON-MODE FEEDBACK

The balanced operational amplifier including its merits and designing methods is discussed by comparing its performance to a conventional differential output amplifier when used in a single balanced stage. A balanced OTA circuit design is also presented.

A Hybrid Five-Level Single-Phase Rectifier with Low Common-Mode Voltage

Rectifiers with high efficiency and high power density are crucial to the stable and efficient power supply of 5G communication base stations,which deserves in-depth investigation.In general,there are two key problems to be addressed:supporting both alternating current(AC)and direct current(DC)input,and minimizing the common-mode voltage as well as leakage current for safety reasons.In this paper,a hybrid five-level single-phase rectifier is proposed.A five-level topology is adopted in the upper arm,and a half-bridge diode topology is adopted in the lower arm.A dual closed-loop control strategy and a flying capacitor voltage regulation method are designed accordingly so that the compatibility of both AC and DC input is realized with low common voltage and small passive devices.Simulation and experimental results demonstrate the effectiveness and performance of the proposed rectifier.

Novel Substrate pn Junction Isolation for RF Integrated Inductors on Silicon

A new method for reducing the substrate rated losses of integrated spiral inductors is presented.The method is to block the eddy currents induced by spiral inductors by directly forming pn junction isolation in the Si substrate. The substrate pn junction can be realized by using the standard silicon technologies without any additional processing steps.Integrated inductors on silicon are designed and fabricated. S parameters of the inductor based equivalent circuit are investigated and the inductor parameters are calculated.The impacts of the substrate pn junction isolation on the inductor quality factor are studied.The experimental results show that substrate pn junction isolation in certain depth has achieved a significant improvement.At 3GHz,the substrate pn junction isolation increases the inductor quality factor by 40%.

A Novel Lateral Solenoidal On-Chip Integrated Inductor Implemented in Conventional Si Process

A new structure of the on- chip integrated inductors im plem ented in conventional Si process is presented as a lateral solenoid.The fabrication process utilizes a conventional Si technology with standard double- layer m etal- lization.S param eters of the inductors based equivalent circuit are investigated and the inductor parameters are cal- culated from the m easured data.Experimental results are presented on an integrated inductors fabricated in a lateral solenoid type utilizing double m etal layers rather than a single metal layer as used in conventional planar spiral de- vices.Inductors with peak Q of 1.3and inductance value of 2 .2 n H are presented,which are com parable to conven- tional planar spiral inductors.

Performance Analysis of RF Spiral Inductor with Gradually Changed Metal Width and Space

To decrease the metal losses of RF spiral inductor,a novel layout structure with gradually reduced metal line width and space from outside to inside is presented. This gradual changed inductor has less eddy-current effect than the conventional inductor of fixed metal width and space. So the series resistance can be reduced and the quality （Q） factor of the inductor relating to metal losses is increased. The obtained experimental results corroborate the validity of the proposed method. For a 6nH inductor on high-resistivity silicon at 2.46GHz,Q factor of 14.25 is 11.3% higher than the conventional inductor with the same layout size. This inductor can be integrated with radio frequency integrated circuits to gain better performance in RF front end of a wireless communication system.

Equivalent Circuit Analysis of an RF Integrated Inductor with Ferrite Thin-Film

An equivalent circuit for a novel RF integrated inductor with ferrite thin-film is derived. The enhancement of the magnetic ferrite thin-film on the inductance （L） and quality factor （Q） of the inductor is analyzed. Circuit element parameters are extracted from RF measurements. Compared with the reference air-core inductor without magnetic film, L and Q of the ferrite thin-film inductor are 17% and 40% higher at 2GHz,respectively. Both the equivalent circuit analysis and test results demonstrate significant enhancement of the performance of RF integration inductors by ferrite thin-film integration.

A 2.4GHz CMOS Quadrature Voltage-Controlled Oscillator Based on Symmetrical Spiral Inductors and Differential Diodes

A voltage controlled oscillator (VCO) which can generate 2 4GHz quadrature local oscillating (LO) signals is reported.It combines a LC VCO,realized by on chip symmetrical spiral inductors and differential diodes,and a two stage ring VCO.The principle of this VCO is demonstrated and further the phase noise is discussed in detail.The fabrication of prototype is demonstrated using 0 25μm single poly five metal N well salicide CMOS digital process.The reports show that the novel VCO is can generate quadrature LO signals with a tuning range of more than 300MHz as well as the phase noise--104 33dBc/Hz at 600KHz offset at 2 41GHz (when measuring only one port of differential outputs).In addition,this VCO can work in low power supply voltage and dissipate low power,thus it can be used in many integrated transceivers.

A Novel Local-Dielectric-Thickening Technique for Performance Improvements of Spiral Inductors on Si Substrates

A novel local-dielectric-thickening technique i s presented for performance improvements of Si-based spiral inductors.This technique employs the processes of deposition,photolithography,and wet-etching,to locally thicken the oxide layer under the inductor,which can decrease the substrate loss and improve the inductor performance.Both the structures and processes are compact,economical,and compatible with CMOS processing.Several square spiral inductors with different inductances are fabricated,and the quality factors and the self-resonant frequencies both increase clearly with this proposed technique:for the 10nH,5nH,and 2nH inductors,the peak quality factors are effectively improved by 46.7%,49.7%,and 68.6%,respectively;however,the improvement percents of the self-resonant frequencies are more significant,which are 92.1%,91.0%,and no less than 68.1% respectively.

Patterned Dual pn Junctions Restraining Substrate Loss of an On-Chip Inductor

Dual pn junctions in lateral and vertical directions are formed by diffusing the p^＋ on the patterned n-well in standard CMOS technology, which are inserted under the inductor in order to reduce the currents in the substrate induced by the electromagnetic field from the inductor. The thickness of high resistance is not equivalent to the width of the depletion region of the vertical pn junctions,but the depth of the bottom pn junction in the substrate are both proposed and validated. For the first time, through the grounded p^＋-diffusion layer shielding the suhstrate from the electric field of the inductor, the width of the depletion regions of the lateral and vertical pn junctions are changed by increasing the voltage applied to the n wells. The quality factor is improved or reduced with the thickness of high resistance by 19%. This phenomenon validates the theory that the pn junction substrate isolation can reduce the loss caused by the currents in the substrate induced by the electromagnetic field from the inductor.

MEMS Inductor Consisting of Suspended Thick Crystalline Silicon Spiral with Copper Surface Coating

A novel MEMS inductor consisting of a planar single crystalline silicon spiral with a copper surface coating as the conductor is presented. Using a silicon-glass anodic bonding and deep etching formation-and-release process,a 40μm-thick silicon spiral is formed, which is suspended on a glass substrate to eliminate substrate loss. The surfaces of the silicon spiral are coated with highly conformal copper by electroless plating to reduce the resis- tive loss in the conductor,with thin nickel film plated on the surface of the copper layer for final surface passivation. The fabricated inductor exhibits a self-resonance frequency higher than 15GHz,with a quality factor of about 40 and an inductance of over 5nil at 11.3GHz. Simulations based on a compact equivalent circuit model of the inductor and parameter extraction using a characteristic-function approach are carried out,and good agreement with measurements is obtained.

Analysis and Optimum Design of Differential Inductors Using Distributed Capacitance Model

A distributed capacitance model for monolithic inductors is developed to predict the equivalently parasitical capacitances of the inductor.The ratio of the self-resonant frequency (f SR) of the differential-driven symmetric inductor to the f SR of the single-ended driven inductor is firstly predicted and explained.Compared with a single-ended configuration,experimental data demonstrate that the differential inductor offers a 127% greater maximum quality factor and a broader range of operating frequencies.Two differential inductors with low parasitical capacitance are developed and validated.

Lumped Equivalent Circuit of Planar Spiral Inductor for CMOS RFIC Application

A lumped π-type equivalent circuit of planar spiral inductor for CMOS RFIC application is developed by the domain decomposition method for conformal modules （DDM-CM）. Closed form expressions of lumped parameters for a square spiral inductor on a Si-SiO2 substrate are obtained and verified with the previously published experimental results.

Parameter Extraction for 2-π Equivalent Circuit Model of RF CMOS Spiral Inductors

A novel parameter extraction method with rational functions is presented for the 2-πequivalent circuit model of RF CMOS spiral inductors. The final S-parameters simulated by the circuit model closely match experimental data. The extraction strategy is straightforward and can be easily implemented as a CAD tool to model spiral inductors. The resulting circuit models will be very useful for RF circuit designers.

Analysis of substrate eddy effects and distribution effects in silicon-based inductor model

The concepts of substrate eddy influence factor and distribution-effects-occurring frequency are presented. The effects of substrate resistivity and inductor spiral length on the substrate eddy and distribution effects are captured. The substrate eddy influence factors of an inductor （6 turn, 3 060 μm in length） fabricated on low （ 1 Ω. cm） and high resistivity（ 1 000 Ω.cm） silicon substrates are 0. 3 and 0. 04, and the distribution-effects- occurring frequencies are 1.8 GHz and 14. 5 GHz, respectively. The measurement results show that the equivalent circuit model of the inductor on low resistivity silicon must take into consideration substrate eddy effects and distribution effects. However, the circuit model of the inductor on high resistivity silicon cannot take into account the substrate eddy effects and the distribution effects at the frequencies of interest. Its simple model shows agreement with the measurements, and the contrast is within 7%.

Fabrication of Meander and Spiral Type Micro Inductors

To obtain microstructure of magnetic devices, the thin film inductors were fabricated by the process such as thin film manufacturing, photolithography and wet etching. The frequency characteristics of these devices are measured at high frequency range. When the inductor sizes of the spiral and the meander type are same, the inductance and the quality factor of the spiral type inductor are larger than those of the meander type inductor, but the driving frequency of the spiral type inductor is lower than that of the meander type inductor.

State Variable Model for Considering the Parasitic Inductor Resistance on the Open Loop Performance of DC to DC Converters

This paper shows DC and small-signal circuit models for the PWM DC to DC buck, boost and back/ boost converters with the equivalent series resistance of the inductor. The DC voltage transfer function and the efficiency of the converter are derived from the DC model. Small-signal open-loop characteristics are derived from the small-signal model based on a state variable model. A design example proves the performance of the circuit and verification of the model.

YIG Thin Film for RF Integrated Inductor

The yttrium iron garnet（YIG） thin films prepared by the sol-gel method and rapid thermal annealing（RTA） process for integrated inductor are investigated. The X-ray diffraction（XRD） results indicate that the YIG film annealed above 650 ℃ is poly-crystalline with single-phase garnet structure. Moreover, it can be found that the initial permeability μi, saturation magnetization MS and coercivity Hc of these YIG films increase with increasing RTA temperature. Low temperature annealing after crystallization can further improve the magnetic properties of YIG film. Thereby, a planar integrated inductor in the presence of Si substrate/SiO2 layer/Y2.8Bi0.2Fe5O12 thin film/Cu spiral coil structure is fabricated successfully by the standard IC processes. Due to the magnetic enhancement originated from YIG film, the inductance L and quality factor Q of the inductor with YIG film are improved in a certain frequency range.

On-Chip Inductor Technique for Improving LNA Performance Operating at 15 GHz

This paper presents a technique for low noise figure reduction of low-noise amplifier (LNA). The proposed LNA is designed in a source degeneration technique that offers lower noise figure. The resistance of the on-chip inductor is reduced by using multilayer that significantly reduces the thermal noise due to spiral inductor. Also, using spiral inductor as a gate inductor reduces the effect of the input parasitic capacitance on the noise figure and provides a good matching at the input and output of the LNA. The results of the LNA using multilayer on-chip inductor compared will off-chip inductor have been illustrated. It shows that the proposed technique reduces significantly the noise figure and improves the matching. The proposed LNA is designed in 0.13 μm process with 1.3 V supply voltage and simulated using Advanced Design System (ADS) software. The simulation results show that the LNA is unconditionally stable and provides a forward gain of 11.087 dB at operating frequency of 15 GHz with 1.784 dB noise figure and input and output impedance matching of –17.93 dB, and –10.04 dB.

Tapped Inductor Quasi-Z-source Inverters

提出一种高升压比的单级升压逆变器，它在传统准z源逆变器拓扑中引入抽头电感无源网络，因此称为“抽头电感准z源逆变器”（tapped inductor quasi-Z-source inverter,TL-qZSI）。该抽头电感无源网络包括一个抽头电感和两个二极管，替代了原准Z源逆变器中的一个电感。类似于抽头电感Z源逆变器（tapped inductor Z-source inverter，TL-ZSI），所提出的逆变器也能提供高升压能力，但比TL-ZSI略低些。分析电路的工作机理、升压能力和控制策略，讨论设计上的考虑。最后通过基于简单升压控制方法的实验结果验证该拓扑的实际性能。