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Multifunctional silicon-based light emitting device in standard complementary metal oxide semiconductor technology 被引量:2
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作者 王伟 黄北举 +1 位作者 董赞 陈弘达 《Chinese Physics B》 SCIE EI CAS CSCD 2011年第1期677-683,共7页
A three-terminal silicon-based light emitting device is proposed and fabricated in standard 0.35 μm complementary metal-oxide-semiconductor technology. This device is capable of versatile working modes: it can emit ... A three-terminal silicon-based light emitting device is proposed and fabricated in standard 0.35 μm complementary metal-oxide-semiconductor technology. This device is capable of versatile working modes: it can emit visible to near infra-red (NIR) light (the spectrum ranges from 500 nm to 1000 nm) in reverse bias avalanche breakdown mode with working voltage between 8.35 V-12 V and emit NIR light (the spectrum ranges from 900 nm to 1300 nm) in the forward injection mode with working voltage below 2 V. An apparent modulation effect on the light intensity from the polysilicon gate is observed in the forward injection mode. Furthermore, when the gate oxide is broken down, NIR light is emitted from the polysilicon/oxide/silicon structure. Optoelectronic characteristics of the device working in different modes are measured and compared. The mechanisms behind these different emissions are explored. 展开更多
关键词 optoelectronic integrated circuit complementary metal-oxide-semiconductor technology silicon-based light emitting device ELECTROLUMINESCENCE
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Small Area ROM Design for Embedded Applications
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作者 崔嵬 吴嗣亮 《Journal of Beijing Institute of Technology》 EI CAS 2007年第4期460-464,共5页
The compact full custom layout design of a 16 kbit mask-programmable complementary metal oxide semiconductor (CMOS) read only memory (ROM) with low power dissipation is introduced. By optimizing storage cell size and ... The compact full custom layout design of a 16 kbit mask-programmable complementary metal oxide semiconductor (CMOS) read only memory (ROM) with low power dissipation is introduced. By optimizing storage cell size and peripheral circuit structure, the ROM has a small area of 0.050 mm2 with a power-delay product of 0.011 pJ/bit at +1.8 V. The high packing density and the excellent power-delay product have been achieved by using SMIC 0.18 μm 1P6M CMOS technology. A novel and simple sense amplifier/driver structure is presented which restores the signal full swing efficiently and reduces the signal rising time by 2.4 ns, as well as the memory access time. The ROM has a fast access time of 8.6 ns. As a consequence, the layout design not only can be embedded into microprocessor system as its program memory, but also can be fabricated individually as ROM ASIC. 展开更多
关键词 complementary metal oxide semiconductor (CMOS) technology read only memory (ROM) address decoder sense amplifier
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