This paper presents a general approach for determining the configuration number for any linkage: A kinematic cham (KC) can be divided into some basic kinematic chains (BKCs) and driving joints; there are only 33 kinds...This paper presents a general approach for determining the configuration number for any linkage: A kinematic cham (KC) can be divided into some basic kinematic chains (BKCs) and driving joints; there are only 33 kinds of BKCs with υ =1-4 independent loop, containing only R (revolute) joints and their configuration numbers are given; the configuration number of a KC equals to the multiplication of the configuration numbers of BKCs contained in the KC.展开更多
A traditional bottom-up modeling method for minimum configuration numbers is adopted for the study of FPGA minimum configurations. This method is limited ifa large number of LUTs and multiplexers are presented. Since ...A traditional bottom-up modeling method for minimum configuration numbers is adopted for the study of FPGA minimum configurations. This method is limited ifa large number of LUTs and multiplexers are presented. Since graph theory has been extensively applied to circuit analysis and test, this paper focuses on the modeling FPGA configurations. In our study, an internal logic block and interconnections of an FPGA are considered as a vertex and an edge connecting two vertices in the graph, respectively. A top-down modeling method is proposed in the paper to achieve minimum configuration numbers for CLB and IOB. Based on the proposed modeling approach and exhaustive analysis, the minimum configuration numbers for CLB and IOB are five and three, respectively.展开更多
文摘This paper presents a general approach for determining the configuration number for any linkage: A kinematic cham (KC) can be divided into some basic kinematic chains (BKCs) and driving joints; there are only 33 kinds of BKCs with υ =1-4 independent loop, containing only R (revolute) joints and their configuration numbers are given; the configuration number of a KC equals to the multiplication of the configuration numbers of BKCs contained in the KC.
文摘A traditional bottom-up modeling method for minimum configuration numbers is adopted for the study of FPGA minimum configurations. This method is limited ifa large number of LUTs and multiplexers are presented. Since graph theory has been extensively applied to circuit analysis and test, this paper focuses on the modeling FPGA configurations. In our study, an internal logic block and interconnections of an FPGA are considered as a vertex and an edge connecting two vertices in the graph, respectively. A top-down modeling method is proposed in the paper to achieve minimum configuration numbers for CLB and IOB. Based on the proposed modeling approach and exhaustive analysis, the minimum configuration numbers for CLB and IOB are five and three, respectively.
