This paper aims to develop an automatic miscalibration detection and correction framework to maintain accurate calibration of LiDAR and camera for autonomous vehicle after the sensor drift.First,a monitoring algorithm...This paper aims to develop an automatic miscalibration detection and correction framework to maintain accurate calibration of LiDAR and camera for autonomous vehicle after the sensor drift.First,a monitoring algorithm that can continuously detect the miscalibration in each frame is designed,leveraging the rotational motion each individual sensor observes.Then,as sensor drift occurs,the projection constraints between visual feature points and LiDAR 3-D points are used to compute the scaled camera motion,which is further utilized to align the drifted LiDAR scan with the camera image.Finally,the proposed method is sufficiently compared with two representative approaches in the online experiments with varying levels of random drift,then the method is further extended to the offline calibration experiment and is demonstrated by a comparison with two existing benchmark methods.展开更多
A dual double interlocked storage cell(DICE)interleaving layout static random-access memory(SRAM)is designed and manufactured based on 65 nm bulk complementary metal oxide semiconductor technology.The single event ups...A dual double interlocked storage cell(DICE)interleaving layout static random-access memory(SRAM)is designed and manufactured based on 65 nm bulk complementary metal oxide semiconductor technology.The single event upset(SEU)cross sections of this memory are obtained via heavy ion irradiation with a linear energy transfer(LET)value ranging from 1.7 to 83.4 MeV/(mg/cm^(2)).Experimental results show that the upset threshold(LETth)of a 4 KB block is approximately 6 MeV/(mg/cm^(2)),which is much better than that of a standard unhardened SRAM with an identical technology node.A 1 KB block has a higher LETth of 25 MeV/(mg/cm^(2))owing to the use of the error detection and correction(EDAC)code.For a Ta ion irradiation test with the highest LET value(83.4 MeV/(mg/cm^(2))),the benefit of the EDAC code is reduced significantly because the multi-bit upset proportion in the SEU is increased remarkably.Compared with normal incident ions,the memory exhibits a higher SEU sensitivity in the tilt angle irradiation test.Moreover,the SEU cross section indicates a significant dependence on the data pattern.When comprehensively considering HSPICE simulation results and the sensitive area distributions of the DICE cell,it is shown that the data pattern dependence is primarily associated with the arrangement of sensitive transistor pairs in the layout.Finally,some suggestions are provided to further improve the radiation resistance of the memory.By implementing a particular design at the layout level,the SEU tolerance of the memory is improved significantly at a low area cost.Therefore,the designed 65 nm SRAM is suitable for electronic systems operating in serious radiation environments.展开更多
Digital images are frequently contaminated by impulse noise(IN)during acquisition and transmission.The removal of this noise from images is essential for their further processing.In this paper,a two-staged nonlinear f...Digital images are frequently contaminated by impulse noise(IN)during acquisition and transmission.The removal of this noise from images is essential for their further processing.In this paper,a two-staged nonlinear filtering algorithm is proposed for removing random-valued impulse noise(RVIN)from digital images.Noisy pixels are identified and corrected in two cascaded stages.The statistics of two subsets of nearest neighbors are employed as the criterion for detecting noisy pixels in the first stage,while directional differences are adopted as the detector criterion in the second stage.The respective adaptive median values are taken as the replacement values for noisy pixels in each stage.The performance of the proposed method was compared with that of several existing methods.The experimental results show that the performance of the suggested algorithm is superior to those of the compared methods in terms of noise removal,edge preservation,and processing time.展开更多
Aiming to the reliable estimates of the ionosphere differential corrections for the satellite navigation system in the presence of the ionosphere anomaly, a fault-tolerance estimating method, which is based on the dis...Aiming to the reliable estimates of the ionosphere differential corrections for the satellite navigation system in the presence of the ionosphere anomaly, a fault-tolerance estimating method, which is based on the distributed Kalman filtering, is proposed. The method utilizes the parallel sub-filters for estimating the ionosphere differential corrections. Meanwhile, an infinite norm (IN) method is proposed for the detection of the ionosphere irregularity in the filter processing. Once the anomaly is detected, the sub-filter contaminated by the anomaly measurements will be excluded to ensure the reliability of the estimates. The simulation is conducted to validate the method and the results indicate that the anomaly can be found timely due to the novel fault detection method based on the infinite norm. Because of the parallel sub-filter architecture, the measurements are classified by the spatial distribution so that the ionosphere anomaly can be positioned and excluded more easily. Thus, the method can provide the robust and accurate ionosphere differential corrections.展开更多
An optimization method of error detection and correction(EDAC) circuit design is proposed. The method involves selecting or constructing EDAC codes of low cost hardware, associated with operation scheduling implemen...An optimization method of error detection and correction(EDAC) circuit design is proposed. The method involves selecting or constructing EDAC codes of low cost hardware, associated with operation scheduling implementation based on 2-input XOR gates structure, and two actions for reducing hardware cells, which can reduce the delay penalties and area costs of the EDAC circuit effectively. The 32-bit EDAC circuit hardware implementation is selected to make a prototype, based on the 180 nm process. The delay penalties and area costs of the EDAC circuit are evaluated. Results show that the time penalty and area cost of the EDAC circuitries are affected with different parity-check matrices and different hardware implementation for the EDAC codes with the same capability of correction and detection code. This method can be used as a guide for low-cost radiation-hardened microprocessor EDAC circuit design and for more advanced technologies.展开更多
基金Supported by National Natural Science Foundation of China(Grant Nos.52025121,52394263)National Key R&D Plan of China(Grant No.2023YFD2000301).
文摘This paper aims to develop an automatic miscalibration detection and correction framework to maintain accurate calibration of LiDAR and camera for autonomous vehicle after the sensor drift.First,a monitoring algorithm that can continuously detect the miscalibration in each frame is designed,leveraging the rotational motion each individual sensor observes.Then,as sensor drift occurs,the projection constraints between visual feature points and LiDAR 3-D points are used to compute the scaled camera motion,which is further utilized to align the drifted LiDAR scan with the camera image.Finally,the proposed method is sufficiently compared with two representative approaches in the online experiments with varying levels of random drift,then the method is further extended to the offline calibration experiment and is demonstrated by a comparison with two existing benchmark methods.
基金the National Natural Science Foundation of China(Nos.12035019,11690041,and 11805244).
文摘A dual double interlocked storage cell(DICE)interleaving layout static random-access memory(SRAM)is designed and manufactured based on 65 nm bulk complementary metal oxide semiconductor technology.The single event upset(SEU)cross sections of this memory are obtained via heavy ion irradiation with a linear energy transfer(LET)value ranging from 1.7 to 83.4 MeV/(mg/cm^(2)).Experimental results show that the upset threshold(LETth)of a 4 KB block is approximately 6 MeV/(mg/cm^(2)),which is much better than that of a standard unhardened SRAM with an identical technology node.A 1 KB block has a higher LETth of 25 MeV/(mg/cm^(2))owing to the use of the error detection and correction(EDAC)code.For a Ta ion irradiation test with the highest LET value(83.4 MeV/(mg/cm^(2))),the benefit of the EDAC code is reduced significantly because the multi-bit upset proportion in the SEU is increased remarkably.Compared with normal incident ions,the memory exhibits a higher SEU sensitivity in the tilt angle irradiation test.Moreover,the SEU cross section indicates a significant dependence on the data pattern.When comprehensively considering HSPICE simulation results and the sensitive area distributions of the DICE cell,it is shown that the data pattern dependence is primarily associated with the arrangement of sensitive transistor pairs in the layout.Finally,some suggestions are provided to further improve the radiation resistance of the memory.By implementing a particular design at the layout level,the SEU tolerance of the memory is improved significantly at a low area cost.Therefore,the designed 65 nm SRAM is suitable for electronic systems operating in serious radiation environments.
基金supported by the Opening Project of Key Laboratory of Astronomical Optics & Technology, Nanjing Institute of Astronomical Optics & Technology, Chinese Academy of Sciences (No. CAS-KLAOTKF201308)partly by the special funding for Young Researcher of Nanjing Institute of Astronomical Optics & Technology,Chinese Academy of Sciences(Y-12)
文摘Digital images are frequently contaminated by impulse noise(IN)during acquisition and transmission.The removal of this noise from images is essential for their further processing.In this paper,a two-staged nonlinear filtering algorithm is proposed for removing random-valued impulse noise(RVIN)from digital images.Noisy pixels are identified and corrected in two cascaded stages.The statistics of two subsets of nearest neighbors are employed as the criterion for detecting noisy pixels in the first stage,while directional differences are adopted as the detector criterion in the second stage.The respective adaptive median values are taken as the replacement values for noisy pixels in each stage.The performance of the proposed method was compared with that of several existing methods.The experimental results show that the performance of the suggested algorithm is superior to those of the compared methods in terms of noise removal,edge preservation,and processing time.
基金National Basic Research Program of China (2010CB731800)
文摘Aiming to the reliable estimates of the ionosphere differential corrections for the satellite navigation system in the presence of the ionosphere anomaly, a fault-tolerance estimating method, which is based on the distributed Kalman filtering, is proposed. The method utilizes the parallel sub-filters for estimating the ionosphere differential corrections. Meanwhile, an infinite norm (IN) method is proposed for the detection of the ionosphere irregularity in the filter processing. Once the anomaly is detected, the sub-filter contaminated by the anomaly measurements will be excluded to ensure the reliability of the estimates. The simulation is conducted to validate the method and the results indicate that the anomaly can be found timely due to the novel fault detection method based on the infinite norm. Because of the parallel sub-filter architecture, the measurements are classified by the spatial distribution so that the ionosphere anomaly can be positioned and excluded more easily. Thus, the method can provide the robust and accurate ionosphere differential corrections.
文摘An optimization method of error detection and correction(EDAC) circuit design is proposed. The method involves selecting or constructing EDAC codes of low cost hardware, associated with operation scheduling implementation based on 2-input XOR gates structure, and two actions for reducing hardware cells, which can reduce the delay penalties and area costs of the EDAC circuit effectively. The 32-bit EDAC circuit hardware implementation is selected to make a prototype, based on the 180 nm process. The delay penalties and area costs of the EDAC circuit are evaluated. Results show that the time penalty and area cost of the EDAC circuitries are affected with different parity-check matrices and different hardware implementation for the EDAC codes with the same capability of correction and detection code. This method can be used as a guide for low-cost radiation-hardened microprocessor EDAC circuit design and for more advanced technologies.