Threshold-type memristor-based crossbar array design and its application in handwritten digit recognition

Neuromorphic computing simulates the operation of biological brain function for information processing and can potentially solve the bottleneck of the Von Neumann architecture.Inspired by the real characteristics of physical memristive devices,we propose a threshold-type nonlinear voltage-controlled memristor mathematical model which is used to design a novel memristor-based crossbar array.The presented crossbar array can simulate the synaptic weight in real number field rather than only positive number field.Theoretical analysis and simulation results of a 2×2 image inversion operation validate the feasibility of the proposed crossbar array and the necessary training and inference functions.Finally,the presented crossbar array is used to construct the neural network and then applied in the handwritten digit recognition.The Mixed National Institute of Standards and Technology(MNIST)database is adopted to train this neural network and it achieves a satisfactory accuracy.

Impact of variations of threshold voltage and hold voltage of threshold switching selectors in 1S1R crossbar array

The impact of the variations of threshold voltage（Vth） and hold voltage（Vhold） of threshold switching（TS） selector in1 S1 R crossbar array is investigated. Based on ON/OFF state I–V curves measurements from a large number of Ag-filament TS selectors, Vthand Vholdare extracted and their variations distribution expressions are obtained, which are then employed to evaluate the impact on read process and write process in 32×32 1 S1 R crossbar array under different bias schemes. The results indicate that Vthand Vholdvariations of TS selector can lead to degradation of 1 S1 R array performance parameters,such as minimum read/write voltage, bit error rate（BER）, and power consumption. For the read process, a small Vhold variation not only results in the minimum read voltage increasing but it also leads to serious degradation of BER. As the standard deviation of Vholdand Vthincreases, the BER and the power consumption of 1 S1 R crossbar array under 1/2 bias,1/3 bias, and floating scheme degrade, and the case under 1/2 bias tends to be more serious compared with other two schemes. For the write process, the minimum write voltage also increases with the variation of Vholdfrom small to large value. A slight increase of Vthstandard deviation not only decreases write power efficiency markedly but also increases write power consumption. These results have reference significance to understand the voltage variation impacts and design of selector properly.

Recent Advances in In-Memory Computing:Exploring Memristor and Memtransistor Arrays with 2D Materials

The conventional computing architecture faces substantial chal-lenges,including high latency and energy consumption between memory and processing units.In response,in-memory computing has emerged as a promising alternative architecture,enabling computing operations within memory arrays to overcome these limitations.Memristive devices have gained significant attention as key components for in-memory computing due to their high-density arrays,rapid response times,and ability to emulate biological synapses.Among these devices,two-dimensional(2D)material-based memristor and memtransistor arrays have emerged as particularly promising candidates for next-generation in-memory computing,thanks to their exceptional performance driven by the unique properties of 2D materials,such as layered structures,mechanical flexibility,and the capability to form heterojunctions.This review delves into the state-of-the-art research on 2D material-based memristive arrays,encompassing critical aspects such as material selection,device perfor-mance metrics,array structures,and potential applications.Furthermore,it provides a comprehensive overview of the current challenges and limitations associated with these arrays,along with potential solutions.The primary objective of this review is to serve as a significant milestone in realizing next-generation in-memory computing utilizing 2D materials and bridge the gap from single-device characterization to array-level and system-level implementations of neuromorphic computing,leveraging the potential of 2D material-based memristive devices.

TiOx-based self-rectifying memory device for crossbar WORM memory array applications

Resistive switching with a self-rectifying feature is one of the most effective solutions to overcome the crosstalk issue in a crossbar array. In this paper, a memory device based on Pt/TiO_(x)/W structure with self-rectifying property is demonstrated for write-once-read-many-times(WORM) memory application. After programming, the devices exhibit excellent uniformity and keep in the low resistance state(LRS) permanently with a rectification ratio as high as 10^(4) at ±1 V. The self-rectifying resistive switching behavior can be attributed to the Ohmic contact at TiO_(x)/W interface and the Schottky contact at Pt/TiO_(x) interface. The results in this paper demonstrate the potential application of TiO_(x)-based WORM memory device in crossbar arrays.

Fabrication of a 256-bits organic memory by soft x-ray lithography

This paper reports a procedure of soft x-ray lithography for the fabrication of an organic crossbar structure. Electron beam lithography is employed to fabricate the mask for soft x-ray lithography, with direct writing technology to the lithograph positive resist and polymethyl methacrylate on the polyimide film. Then Au is electroplated on the polyimide film. Hard contact mode exposure is used in x-ray lithography to transfer the graph from the mask to the wafer. The 256-bits organic memory is achieved with the critical dimension of 250 nm.

In-memory computing to break the memory wall

Facing the computing demands of Internet of things(IoT)and artificial intelligence(AI),the cost induced by moving the data between the central processing unit(CPU)and memory is the key problem and a chip featured with flexible structural unit,ultra-low power consumption,and huge parallelism will be needed.In-memory computing,a non-von Neumann architecture fusing memory units and computing units,can eliminate the data transfer time and energy consumption while performing massive parallel computations.Prototype in-memory computing schemes modified from different memory technologies have shown orders of magnitude improvement in computing efficiency,making it be regarded as the ultimate computing paradigm.Here we review the state-of-the-art memory device technologies potential for in-memory computing,summarize their versatile applications in neural network,stochastic generation,and hybrid precision digital computing,with promising solutions for unprecedented computing tasks,and also discuss the challenges of stability and integration for general in-memory computing.