Cyclic spectral correlation above the bifrequency plane for the received signal was calculated by the strip spectral correlation algorithm （SSCA）and then was normalized. The result was expressed by matrix. The sum o...Cyclic spectral correlation above the bifrequency plane for the received signal was calculated by the strip spectral correlation algorithm （SSCA）and then was normalized. The result was expressed by matrix. The sum of error-square was computed between corresponding elements for the theoretical sampling matrix of all kinds of modulated signals and calculated matrix. The modulation type was recognized by exploiting the minimum value of the sum of error-square. No extracted characteristic parameter and prior information are needed for identifying the modulation type compared to the conventional methods. In addition, the new method extends the recognition scope and has high recognition probability at low SNR. The simulation results obtained by means of Monter-Carlo method proved the presented algorithm.展开更多
This paper presents a high-speed column-parallel cyclic analog-to-digital converter（ADC） for a CMOS image sensor.A correlated double sampling（CDS） circuit is integrated in the ADC,which avoids a stand-alone CDS ci...This paper presents a high-speed column-parallel cyclic analog-to-digital converter（ADC） for a CMOS image sensor.A correlated double sampling（CDS） circuit is integrated in the ADC,which avoids a stand-alone CDS circuit block.An offset cancellation technique is also introduced,which reduces the column fixed-pattern noise（FPN） effectively.One single channel ADC with an area less than 0.02 mm^2 was implemented in a 0.13μm CMOS image sensor process.The resolution of the proposed ADC is 10-bit,and the conversion rate is 1.6 MS/s. The measured differential nonlinearity and integral nonlinearity are 0.89 LSB and 6.2 LSB together with CDS, respectively.The power consumption from 3.3 V supply is only 0.66 mW.An array of 48 10-bit column-parallel cyclic ADCs was integrated into an array of CMOS image sensor pixels.The measured results indicated that the ADC circuit is suitable for high-speed CMOS image sensors.展开更多
文摘Cyclic spectral correlation above the bifrequency plane for the received signal was calculated by the strip spectral correlation algorithm （SSCA）and then was normalized. The result was expressed by matrix. The sum of error-square was computed between corresponding elements for the theoretical sampling matrix of all kinds of modulated signals and calculated matrix. The modulation type was recognized by exploiting the minimum value of the sum of error-square. No extracted characteristic parameter and prior information are needed for identifying the modulation type compared to the conventional methods. In addition, the new method extends the recognition scope and has high recognition probability at low SNR. The simulation results obtained by means of Monter-Carlo method proved the presented algorithm.
基金supported by the National Natural Science Foundation of China(Nos.60976023,61234003)the Special Funds for Major State Basic Research Project of China(No.2011CB932902)
文摘This paper presents a high-speed column-parallel cyclic analog-to-digital converter（ADC） for a CMOS image sensor.A correlated double sampling（CDS） circuit is integrated in the ADC,which avoids a stand-alone CDS circuit block.An offset cancellation technique is also introduced,which reduces the column fixed-pattern noise（FPN） effectively.One single channel ADC with an area less than 0.02 mm^2 was implemented in a 0.13μm CMOS image sensor process.The resolution of the proposed ADC is 10-bit,and the conversion rate is 1.6 MS/s. The measured differential nonlinearity and integral nonlinearity are 0.89 LSB and 6.2 LSB together with CDS, respectively.The power consumption from 3.3 V supply is only 0.66 mW.An array of 48 10-bit column-parallel cyclic ADCs was integrated into an array of CMOS image sensor pixels.The measured results indicated that the ADC circuit is suitable for high-speed CMOS image sensors.
