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On-chip cyclic-AWG-based 12 × 12 silicon wavelength routing switches with minimized port-to-port insertion loss fluctuation 被引量:2
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作者 ZEPENG PAN SONGNIAN FU +4 位作者 LULUZI LU DONGYU LI WEIJIE CHANG DEMING LIU MINMING ZHANG 《Photonics Research》 SCIE EI 2018年第5期380-384,共5页
With the rapidly increasing bandwidth requirements of optical communication networks, compact and low-cost large-scale optical switches become necessary. Silicon pbotonics is a promising technology due to its small fo... With the rapidly increasing bandwidth requirements of optical communication networks, compact and low-cost large-scale optical switches become necessary. Silicon pbotonics is a promising technology due to its small footprint, cost competitiveness, and high bandwidth density. In this paper, we demonstrate a 12 × 12 silicon wavelength routing switch employing cascaded arrayed waveguide interconnection network on a the switch's footprint. We single chip. We optimize develop an algorithm based gratings (AWGs) connected by a silicon waveguide the connecting strategy of the crossing structure to reduce on minimum standard deviation to minimize the port-to- port insertion loss (IL) fluctuation of the switch globally. The simulated port-to-port IL fluctuation decreases by about 3 dB compared with that of the conventional one. The average measured port-to-port IL is 13.03 dB, with a standard deviation of 0.78 dB and a fluctuation of 2.39 dB. The device can be used for wide applications in core networks and data centers. 展开更多
关键词 On-chip cyclic-awg-based 12 × 12 silicon wavelength routing switches minimized port-to-port insertion loss fluctuation
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