The process reasons for weak point formation of the deep trench on SOI wafers have been analyzed in detail. An optimized trench process is also proposed. It is found that there are two main reasons： one is over-etchi...The process reasons for weak point formation of the deep trench on SOI wafers have been analyzed in detail. An optimized trench process is also proposed. It is found that there are two main reasons： one is over-etching laterally of the silicon on the surface of the buried oxide caused by a fringe effect; and the other is the slow growth rate of the isolation oxide in the concave silicon comer of the trench bottom. In order to improve the isolation performance of the deep trench, two feasible ways for optimizing the trench process are proposed. The improved process thickens the isolation oxide and rounds sharp silicon comers at their weak points, increasing the applied voltage by 15-20 V at the same leakage current. The proposed new trench isolation process has been verified in the foundry＇s 0.5-μm HV SOI technology.展开更多
功率半导体器件以其优越的电特性在许多领域取代了传统的双极型晶体管。功率半导体器件导通电阻由于受击穿电压限制而存在一个极限即硅限而无法再降低。"超级结理论"的应用,使导通电阻相对于传统技术降低了80%~90%,打破了硅限...功率半导体器件以其优越的电特性在许多领域取代了传统的双极型晶体管。功率半导体器件导通电阻由于受击穿电压限制而存在一个极限即硅限而无法再降低。"超级结理论"的应用,使导通电阻相对于传统技术降低了80%~90%,打破了硅限,提高了开关速度。通过对腔体压力、温度、RF功率、气体流量、硅片图形密度和刻蚀面积等各种工艺参数的实验,研究其对深沟槽超级结(Deep Trench Super Junction)高压器件干法刻蚀工艺的影响与作用,实现单步干法刻蚀就在硅衬底上形成深沟槽。展开更多
文摘The process reasons for weak point formation of the deep trench on SOI wafers have been analyzed in detail. An optimized trench process is also proposed. It is found that there are two main reasons： one is over-etching laterally of the silicon on the surface of the buried oxide caused by a fringe effect; and the other is the slow growth rate of the isolation oxide in the concave silicon comer of the trench bottom. In order to improve the isolation performance of the deep trench, two feasible ways for optimizing the trench process are proposed. The improved process thickens the isolation oxide and rounds sharp silicon comers at their weak points, increasing the applied voltage by 15-20 V at the same leakage current. The proposed new trench isolation process has been verified in the foundry＇s 0.5-μm HV SOI technology.
文摘功率半导体器件以其优越的电特性在许多领域取代了传统的双极型晶体管。功率半导体器件导通电阻由于受击穿电压限制而存在一个极限即硅限而无法再降低。"超级结理论"的应用,使导通电阻相对于传统技术降低了80%~90%,打破了硅限,提高了开关速度。通过对腔体压力、温度、RF功率、气体流量、硅片图形密度和刻蚀面积等各种工艺参数的实验,研究其对深沟槽超级结(Deep Trench Super Junction)高压器件干法刻蚀工艺的影响与作用,实现单步干法刻蚀就在硅衬底上形成深沟槽。
