Doppler radar by using single multicarrier pulse based on optical fibre delay lines

The proposed Doppler measurement technique shows that the Doppler measurements can be accomplished by a single pulse with multiple frequency components through optical fibre delay lines.Range and velocity ambiguity can be removed,and the velocity resolution can be improved dramatically by using long optical fibre delay lines.Furthermore,the velocity resolution can be modified by adjusting the length of optical fibre delay lines.In addition,the proposed radar can achieve high range resolution by using a single wideband pulse.As a result,the new approach can improve radar performance significantly.

A large bandwidth photonic delay line using passive cascaded silicon-on-insulator microring resonators

This paper investigated the design and the characterization of a photonic delay line based on passive cascaded silicon-on-insulator （SOI） microrings. We considered the compromise of group delay, bandwidth and insertion loss. A 3-stage double channel side-coupled integrated spaced sequence of resonator （SCISSOR） device was optimized by shifting the resonance of each microring and fabricated with electron beam lithography and dry etching. The group delay was measured to be 17 ps for non-return-to-zero signals at different bit rates and the bandwidth of 78 GHz was achieved. The experiment result agreed well with our simulation.

Synchronization and bidirectional communication without delay line using strong mutually coupled semiconductor lasers

This paper numerically demonstrates synchronization and bidirectional communication without delay line by using two semiconductor lasers with strong mutual injection in a face-to-face configuration. These results show that both of the two lasers＇ outputs synchronize with their input chaotic carriers. In addition, simulations demonstrate that this kind of synchronization can be used to realize bidirectional communications without delay line. Further studies indicate that within a small deviation in message amplitudes of two sides （±6%）, the message can be extracted with signal-noise-ratio more than 10 dB; and the signal-noise-ratio is extremely sensitive to the message rates mismatch of two sides, which may be used as a key of bidirectional communication.

Tunable hexagonal boron nitride topological optical delay line in the visible region

Tunability,ultracompact design,high group index,low loss,and broad bandwidth are desired properties for integrated optical delay lines(ODLs).However,those properties are challenging to achieve simultaneously in the visible region.This paper proposes a tunable hexagonal boron nitride topological optical delay line(ODL)in the visible region based on valley photonic crystals.The topological edge state from the beard-type boundary allows the achievement of an ultralow group velocity close to zero,which results in a large group index of 629 at 645 nm.Moreover,we demonstrate tuning of the slow-light wavelength and optical delay times with electrically tunable liquid crystals by applying external voltage.The device has an ultracompact size of 5μm×2.7μm with an optical delay distance of 25a(a is the lattice constant)and a delay time of 12 ps.Our design can provide a new possibility for designing ODLs working in the visible region for optical communication and quantum computing systems.

Adaptive broadband beamformer for nonuniform linear array based on second order cone programming

Adaptive broadband beamforraing is a key issue in array applications. The adaptive broadband beamformer with tapped delay line （TDL） structure for nonuniform linear array （NLA） is designed according to the rule of minimizing the beamformer＇s output power while keeping the distortionless response （DR） in the direction of desired signal and keeping the constant beamwidth （CB） with the prescribed sidelobe level over the whole operating band. This kind of beamforming problem can be solved with the interior-point method after being converted to the form of standard second order cone programming （SOCP）. The computer simulations are presented which illustrate the effectiveness of our beamformer.

SRV constraint based FIB design for wideband linear array

Frequency-invariant beamformer （FIB） design is a key issue in wideband array signal processing. To use commonly wideband linear array with tapped delay line （TDL） structure and complex weights, the FIB design is provided according to the rule of minimizing the sidelobe level of the beampattern at the reference frequency while keeping the distortionless response constraint in the mainlobe direction at the reference frequency, the norm constraint of the weight vector and the amplitude constraint of the averaged spatial response variation （SRV）. This kind of beamformer design problem can be solved with the interior-point method after being converted to the form of standard second order cone programming （SOCP）. The computer simulations are presented which illustrate the effectiveness of our FIB design method for the wideband linear array with TDL structure and complex weights.

New One-Way Line for Electric Transmission System

There are three well known types of wire lines for transmitting electrical energy or information. The first type is ordinary two wires line （below A-Line）. The second type is so-called single-wire line, where ground plays the role instead of second wire. Polyphase systems belong to the third type, three phase system is the most popular among them. The purpose of this article is another attempt to build a one-wired （without ground） system--the transmission of electrical energy. In this paper an original idea of building such a system is justified, the results of simulations and laboratory modeling are presented. It is shown that the proposed method can reduce the cost of electric transmission lines, the losses in them and significantly reduce interferences.

Low-loss chip-scale programmable silicon photonic processor

Chip-scale programmable optical signal processors are often used to flexibly manipulate the optical signals for satisfying the demands in various applications,such as lidar,radar,and artificial intelligence.Silicon photonics has unique advantages of ultra-high integration density as well as CMOS compatibility,and thus makes it possible to develop large-scale programmable optical signal processors.The challenge is the high silicon waveguides propagation losses and the high calibration complexity for all tuning elements due to the random phase errors.In this paper,we propose and demonstrate a programmable silicon photonic processor for the first time by introducing low-loss multimode photonic waveguide spirals and low-random-phase-error Mach-Zehnder switches.The present chip-scale programmable silicon photonic processor comprises a 1×4 variable power splitter based on cascaded Mach-Zehnder couplers(MZCs),four Ge/Si photodetectors,four channels of thermally-tunable optical delaylines.Each channel consists of a continuously-tuning phase shifter based on a waveguide spiral with a micro-heater and a digitally-tuning delayline realized with cascaded waveguide-spiral delaylines and MZSs for 5.68 ps time-delay step.Particularly,these waveguide spirals used here are designed to be as wide as 2μm,enabling an ultralow propagation loss of 0.28 dB/cm.Meanwhile,these MZCs and MZSs are designed with 2-μm-wide arm waveguides,and thus the random phase errors in the MZC/MZS arms are negligible,in which case the calibration for these MZSs/MZCs becomes easy and furthermore the power consumption for compensating the phase errors can be reduced greatly.Finally,this programmable silicon photonic processor is demonstrated successfully to verify a number of distinctively different functionalities,including tunable time-delay,microwave photonic beamforming,arbitrary optical signal filtering,and arbitrary waveform generation.

基于MEMS开关的可调实时延时器设计

为了有效解决相控阵雷达/天线瞬时带宽小、孔径效应严重、功耗大等问题,将射频MEMS开关引入实时可调延时器结构中,设计了一种基于射频MEMS开关的实时可调延时器。通过MEMS双掷开关选择具有不同电长度的延时路径,在DC~20 GHz内实现了5位的射频信号延时。利用HFSS三维电磁仿真软件对延时单元的几何参数进行仿真优化,得到5个可切换延时状态的延时量,分别为64.76 ps,101.46 ps,137.97 ps,174.61 ps,210.98 ps,延时步进为36.5 ps,整体面积约为5 mm^(2)。与其他实时可调延时器相比,该实时可调延时器具有多可控位数、大延时带宽积、高集成度等优点。

Channel Estimation and Throughput Evaluation for 5G Wireless Communication Systems in Various Scenarios on High Speed Railways

The fifth generation （5G） wireless communication is currently a hot research topic and wireless communication systems on high speed railways （HSR） are important applications of 5G technologies. Existing stud- ies about 5G wireless systems on high speed railways （HSR） often utilize ideal channel parameters and are usually based on simple scenarios. In this paper, we evaluate the down- link throughput of 5G HSR communication systems on three typical scenarios including urban, cutting and viaduct with three different channel estimators. The channel parameters of each scenario are generated with tapped delay line （TDL） models through ray-tracing sim- ulations, which can be considered as a good match to practical situations. The channel estimators including least square （LS）, linear minimum mean square error （LMMSE）, and our proposed historical information based ba- sis expansion model （HiBEM）. We analyze the performance of the HiBEM estimator in terms of mean square error （MSE） and evaluate the system throughputs with different channel estimates over each scenario. Simulation results are then provided to corroborate our proposed studies. It is shown that our HiBEM estimator outperforms other estimators and that the sys-tem throughput can reach the highest point in the viaduct scenario.

The Jitter Performance Comparison Between DLL and PLL-Based RF CMOS Oscillators

By jitter performance comparison between PLL (Phase Locked Loop) and DLL (Delay Locked Loop),a helpful equation is derived for the structure choice between DLL and PLL based synthesizers fabricated in CMOS processes to get an optimum jitter performance and power consumption.For a frequency synthesizer,a large multiple factor prefers PLL based configuration which consumes less power,while a small one needs DLL based topology which produces a better jitter performance.

Integrated optical delay lines:a review and perspective[Invited]

Optical delay lines（ODLs） are one of the key enabling components in photonic integrated circuits and systems.They are widely used in time-division multiplexing, optical signal synchronization and buffering, microwave signal processing, beam forming and steering, etc. The development of integrated photonics pushes forward the miniaturization of ODLs, offering improved performances in terms of stability, tuning speed, and power consumption. The integrated ODLs can be implemented using various structures, such as single or coupled resonators, gratings, photonic crystals, multi-path switchable structures, and recirculating loop structures.The delay tuning in ODLs is enabled by either changing the group refractive index of the waveguide or changing the length of the optical path. This paper reviews the recent development of integrated ODLs with a focus on their abundant applications and flexible implementations. The challenges and potentials of each type of ODLs are pointed out.

Fiber-delay-line-referenced optical frequency combs:three stabilization schemes

We demonstrate the stabilization of an optical frequency comb(OFC) using a segment of fiber delay line as a reference. A mode-locked Er-doped fiber laser is phase locked to a kilometer-long fiber delay line using three different schemes. The short-term stability of the comb modes in the OFC stabilized by these schemes is obviously enhanced, down to the 10;level at millisecond average time. Among these three schemes, phase locking two bunches of comb modes in the OFC to the same fiber delay line exhibits the lowest residual phase noise. Fiber-delay-line-referenced OFCs can provide reliable laser sources in precise metrology owing to the advances of low cost, compactness, and high integration.

Delay line readout of a large dimension multi-wire proportional chamber

A two dimensional multi-wire proportional chamber with delay line readout was developed, which has a large sensitive area of 30 cmx30 cm. Two cathode planes using printed circuit boards are orthogonally placed to give two coordinates of the impact point of the particle. Signals collected from the cathode strips are amplified and discriminated from two ends of the delay line at each cathode board. By recording the time difference between the two discrimination pulses and the common gate pulse from anode wires, a coordinate position was reconstructed, and a position resolution of better than 1 mm could be obtained in the whole sensitive area along the anode wires.

Ultrasonic beam steering using Neumann boundary condition in multiplysics

The traditional one-dimensional ultrasonic beam steering has time delay and is thus a complicated problem. A numerical model of ultrasonic beam steering using Neumann boundary condition in multiplysics is presented in the present paper. This model is based on the discrete wave number method that has been proved theoretically to satisfy the continuous conditions. The propagating angle of novel model is a function of the distance instead of the time domain. The propagating wave fronts at desired angles are simulated with the single line sources for plane wave. The result indicates that any beam angle can be steered by discrete line elements resources without any time delay.

V2V Channel Modeling at 5.2 GHz for Highway Environment

To design and evaluate vehicle-to-vehicle(V2V)communication systems in intelligent transportation system(ITS),it is important to understand the propagation mechanisms and channel models of V2V channels.This paper aims to analyze the channel models at 5.2 GHz for the highway environment in obstructed line-of-sight(OLoS)and line-of-sight(LoS)scenarios,particularly the vehicle connectivity probability derivation based on the propagation model obtained from measurement.First,the path loss(PL),shadow fading(SF),narrowband K-factor,and small-scale amplitude fading are analyzed.Results showed that the received signal magnitude follows Rice and Weibull distribution in LoS and OLoS scenarios,respectively.Second,we develop simple and low-complexity tapped delay line(TDL)models with a 10 MHz bandwidth for LoS and OLoS scenarios;in addition,we investigate the wideband K-factor,the root mean square delay spread(RMS-DS),and delay-Doppler spectrum.Third,we derive the closed form connectivity probability between any two vehicles in the presence of Weibull fading channel,and analyze the effects of Weibull fading channel and traffic parameters on connectivity.It is found that Weibull fading parameter,transmit power and vehicle density have positive impact on connectivity probability,PL exponent has negative impact on connectivity probability.

Optical True Time Delay for Phased Array Antennas Composed of 2×2 Optical MEMS Switches and Fiber Delay Lines

We proposed an optical true time delay (TTD) for phased array antennas (PAAs) composed of 2×2 optical MEMS switches, single-mode fiber delay lines, and a fixed wavelength laser diode. A 3-bit TTD for 10 GHz PAAs was implemented with a time delay error less than ± 0.2 ps.

A high-linearity and high-resolution delay line structure with a calibration algorithm in delay-based LINC transmitters

In order to overcome the bottleneck of low linearity and low resolution, an improved delay line structure is proposed with a calibration algorithm to conquer PVT （process, voltage and temperature） variations for an all- digital design. The chip is implemented in 0.13 μm CMOS technology. Measurement results show that the proposed structure with the calibration algorithm can evidently improve the linearity and resolution of the delay line. The delay resolution is 2 ps and the root mean square jitter of the delay is 4.71 ps, leading to an error vector magnitude enhancement of 1.32 dB.

On-Chip Built-in Jitter Measurement Circuit for PLL Based on Duty-Cycle Modulation Vernier Delay Line

Phase-locked loops (PLLs) are essential wherever a local event is synchronized with a periodic external event. They are utilized as on-chip clock frequency generators to synthesize a low skew and higher internal frequency clock from an external lower frequency signal and its characterization and measurement have recently been calling for more and more attention. In this paper, a built-in on-chip circuit for measuring jitter of PLL based on a duty cycle modulation vernier delay line is proposed and demonstrated. The circuit employs two delay lines to measure the timing difference and transform the difference signal into digital words. The vernier lines are composed of delay cells whose duty cycle can be adjusted by a feedback voltage. It enables the circuit to have a self calibration capability which eliminates the mismatch problem caused by the process variation.

BD512模拟延迟线的原理及其应用

我所研制的BD512是一种新型集成电路,系集成戽链器件,它在音频处理方面有着广泛的用途。本文就BD512电路的原理和应用作了叙述。