水声信道具有稀疏性的特点,因此高精度低复杂度的稀疏信道估计算法对水声通信具有重要意义。基于自适应滤波算法的信道估计问题本质上是线性回归模型参数的求解问题,传统的最小二乘(Least Square,LS)、最小均方(Least Mean Square,LMS)...水声信道具有稀疏性的特点,因此高精度低复杂度的稀疏信道估计算法对水声通信具有重要意义。基于自适应滤波算法的信道估计问题本质上是线性回归模型参数的求解问题,传统的最小二乘(Least Square,LS)、最小均方(Least Mean Square,LMS)及递归最小二乘(Recursive Least Squares,RLS)算法在估计稀疏信道时不仅复杂度较高,而且在求解线性回归模型时,因忽略自变量的多重共线性而使稀疏信道估计精度降低。针对上述问题,首先,在经典RLS算法的代价函数中加入信道系数的范数对其进行约束,从而提高了稀疏信道估计的精度,然后,采用滑动窗的方式对其代价函数进行处理以减少算法的计算量。在此基础上又引入二分坐标下降(Dichotomous Coordinate Descent,DCD)算法搜索单次迭代中使代价函数最小的解,进一步降低了算法的复杂度。仿真结果表明,文中所提的算法相较于经典算法在估计精度和复杂度方面具有一定的优越性。展开更多
This paper presents a hardware architecture using mixed pipeline and parallel processing for complex division based on dichotomous coordinate descent(DCD) iterations. The objective of the proposed work is to achieve l...This paper presents a hardware architecture using mixed pipeline and parallel processing for complex division based on dichotomous coordinate descent(DCD) iterations. The objective of the proposed work is to achieve low-latency and resource optimized complex divider architecture in adaptive weight computation stage of minimum variance distortionless response(MVDR)algorithm. In this work, computation of complex division is modeled as a 2×2 linear equation solution problem and the DCD algorithm allows linear systems of equations to be solved with high degree of computational efficiency. The operations in the existing DCD algorithm are suitably parallel pipelined and the performance is optimized to 2 clock cycles per iteration. To improve the degree of parallelism, a parallel column vector read architecture is devised.The proposed work is implemented on the field programmable gate array(FPGA) platform and the results are compared with state-of-art literature. It concludes that the proposed architecture is suitable for complex division in adaptive weight computation stage of MVDR beamformer. We demonstrate the performance of the proposed architecture for MVDR beamformer employed in medical ultrasound imaging applications.展开更多
Multiuser detection can be described as a quadratic optimization problem with binary constraint. Many techniques are available to find approximate solution to this problem. These tech- niques can be characterized in t...Multiuser detection can be described as a quadratic optimization problem with binary constraint. Many techniques are available to find approximate solution to this problem. These tech- niques can be characterized in terms of complexity and detection performance. The ＂efficient frontier＂ of known techniques include the decision-feedback, branch-and-bound and probabilistic data association detectors. The presented iterative multiuser detection technique is based on joint deregularized and box-constrained so- lution to quadratic optimization with iterations similar to that used in the nonstationary Tikhonov iterated algorithm. The deregulari- zation maximizes the energy of the solution, this is opposite to the Tikhonov regularization where the energy is minimized. However, combined with box-constraints, the deregularization forces the solution to be close to the binary set. We further exploit the box- constrained dichotomous coordinate descent （DCD） algorithm and adapt it to the nonstationary iterative Tikhonov regularization to present an efficient detector. As a result, the worst-case and aver- age complexity are reduced down to K28 and K2~ floating point operation per second, respectively. The development improves the ＂efficient frontier＂ in multiuser detection, which is illustrated by simulation results. Finally, a field programmable gate array （FPGA） design of the detector is presented. The detection performance obtained from the fixed-point FPGA implementation shows a good match to the floating-point implementation.展开更多
文摘水声信道具有稀疏性的特点,因此高精度低复杂度的稀疏信道估计算法对水声通信具有重要意义。基于自适应滤波算法的信道估计问题本质上是线性回归模型参数的求解问题,传统的最小二乘(Least Square,LS)、最小均方(Least Mean Square,LMS)及递归最小二乘(Recursive Least Squares,RLS)算法在估计稀疏信道时不仅复杂度较高,而且在求解线性回归模型时,因忽略自变量的多重共线性而使稀疏信道估计精度降低。针对上述问题,首先,在经典RLS算法的代价函数中加入信道系数的范数对其进行约束,从而提高了稀疏信道估计的精度,然后,采用滑动窗的方式对其代价函数进行处理以减少算法的计算量。在此基础上又引入二分坐标下降(Dichotomous Coordinate Descent,DCD)算法搜索单次迭代中使代价函数最小的解,进一步降低了算法的复杂度。仿真结果表明,文中所提的算法相较于经典算法在估计精度和复杂度方面具有一定的优越性。
基金supported by Microelectronics Division of the Ministry of Electronics and Information Technology,Government of India,under SMDP-C2SD Project(9(1)/2014–MDD)
文摘This paper presents a hardware architecture using mixed pipeline and parallel processing for complex division based on dichotomous coordinate descent(DCD) iterations. The objective of the proposed work is to achieve low-latency and resource optimized complex divider architecture in adaptive weight computation stage of minimum variance distortionless response(MVDR)algorithm. In this work, computation of complex division is modeled as a 2×2 linear equation solution problem and the DCD algorithm allows linear systems of equations to be solved with high degree of computational efficiency. The operations in the existing DCD algorithm are suitably parallel pipelined and the performance is optimized to 2 clock cycles per iteration. To improve the degree of parallelism, a parallel column vector read architecture is devised.The proposed work is implemented on the field programmable gate array(FPGA) platform and the results are compared with state-of-art literature. It concludes that the proposed architecture is suitable for complex division in adaptive weight computation stage of MVDR beamformer. We demonstrate the performance of the proposed architecture for MVDR beamformer employed in medical ultrasound imaging applications.
基金supported by the National Council for Technological and Scientific Development of Brazil (RN82/2008)
文摘Multiuser detection can be described as a quadratic optimization problem with binary constraint. Many techniques are available to find approximate solution to this problem. These tech- niques can be characterized in terms of complexity and detection performance. The ＂efficient frontier＂ of known techniques include the decision-feedback, branch-and-bound and probabilistic data association detectors. The presented iterative multiuser detection technique is based on joint deregularized and box-constrained so- lution to quadratic optimization with iterations similar to that used in the nonstationary Tikhonov iterated algorithm. The deregulari- zation maximizes the energy of the solution, this is opposite to the Tikhonov regularization where the energy is minimized. However, combined with box-constraints, the deregularization forces the solution to be close to the binary set. We further exploit the box- constrained dichotomous coordinate descent （DCD） algorithm and adapt it to the nonstationary iterative Tikhonov regularization to present an efficient detector. As a result, the worst-case and aver- age complexity are reduced down to K28 and K2~ floating point operation per second, respectively. The development improves the ＂efficient frontier＂ in multiuser detection, which is illustrated by simulation results. Finally, a field programmable gate array （FPGA） design of the detector is presented. The detection performance obtained from the fixed-point FPGA implementation shows a good match to the floating-point implementation.
